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Add lcd 32122a module cfg.
[bertos.git]
/
bertos
/
cpu
/
cortex-m3
/
drv
/
timer_cm3.c
diff --git
a/bertos/cpu/cortex-m3/drv/timer_cm3.c
b/bertos/cpu/cortex-m3/drv/timer_cm3.c
index a4d9668943d35bf186c80d30ce5fcd948efdfe85..e5a730bfe381f5d805216606e504d734125396c1 100644
(file)
--- a/
bertos/cpu/cortex-m3/drv/timer_cm3.c
+++ b/
bertos/cpu/cortex-m3/drv/timer_cm3.c
@@
-43,18
+43,18
@@
INLINE void timer_hw_setPeriod(unsigned long period)
{
ASSERT(period < (1 << 24));
INLINE void timer_hw_setPeriod(unsigned long period)
{
ASSERT(period < (1 << 24));
-
HWREG(NVIC_ST_RELOAD)
= period - 1;
+
NVIC_ST_RELOAD_R
= period - 1;
}
static void timer_hw_enable(void)
{
}
static void timer_hw_enable(void)
{
-
HWREG(NVIC_ST_CTRL)
|=
+
NVIC_ST_CTRL_R
|=
NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN;
}
static void timer_hw_disable(void)
{
NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN;
}
static void timer_hw_disable(void)
{
-
HWREG(NVIC_ST_CTRL)
&= ~(NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN);
+
NVIC_ST_CTRL_R
&= ~(NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN);
}
void timer_hw_init(void)
}
void timer_hw_init(void)