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STM32: GPIO: use uint16_t for the mask of pins that we want read/write
[bertos.git]
/
bertos
/
cpu
/
cortex-m3
/
drv
/
usb_stm32.c
diff --git
a/bertos/cpu/cortex-m3/drv/usb_stm32.c
b/bertos/cpu/cortex-m3/drv/usb_stm32.c
index dd1e09dbaa56fba1f9a58846010ba295b425c299..c562512e1bb9858230136bcaf41d43e07d68e3db 100644
(file)
--- a/
bertos/cpu/cortex-m3/drv/usb_stm32.c
+++ b/
bertos/cpu/cortex-m3/drv/usb_stm32.c
@@
-814,22
+814,27
@@
static int usb_ep_configure(const UsbEndpointDesc *epd, bool enable)
switch (ep_hw->type)
{
case USB_ENDPOINT_XFER_CONTROL:
switch (ep_hw->type)
{
case USB_ENDPOINT_XFER_CONTROL:
- LOG_INFO("EP%d: CONTROL IN\n", EP >> 1);
+ LOG_INFO("EP%d: CONTROL %s\n", EP >> 1,
+ EP & 1 ? "IN" : "OUT");
ep_ctrl_set_ep_type(hw, EP_CTRL);
ep_ctrl_set_ep_kind(hw, 0);
break;
case USB_ENDPOINT_XFER_INT:
ep_ctrl_set_ep_type(hw, EP_CTRL);
ep_ctrl_set_ep_kind(hw, 0);
break;
case USB_ENDPOINT_XFER_INT:
- LOG_INFO("EP%d: INTERRUPT IN\n", EP >> 1);
+ LOG_INFO("EP%d: INTERRUPT %s\n", EP >> 1,
+ EP & 1 ? "IN" : "OUT");
ep_ctrl_set_ep_type(hw, EP_INTERRUPT);
ep_ctrl_set_ep_kind(hw, 0);
break;
case USB_ENDPOINT_XFER_BULK:
ep_ctrl_set_ep_type(hw, EP_INTERRUPT);
ep_ctrl_set_ep_kind(hw, 0);
break;
case USB_ENDPOINT_XFER_BULK:
- LOG_INFO("EP%d: BULK IN\n", EP >> 1);
+ LOG_INFO("EP%d: BULK %s\n", EP >> 1,
+ EP & 1 ? "IN" : "OUT");
ep_ctrl_set_ep_type(hw, EP_BULK);
ep_ctrl_set_ep_kind(hw, 0);
break;
case USB_ENDPOINT_XFER_ISOC:
ep_ctrl_set_ep_type(hw, EP_BULK);
ep_ctrl_set_ep_kind(hw, 0);
break;
case USB_ENDPOINT_XFER_ISOC:
- LOG_ERR("EP%d: ISOCHRONOUS IN: not supported\n", EP >> 1);
+ LOG_ERR("EP%d: ISOCHRONOUS %s: not supported\n",
+ EP >> 1,
+ EP & 1 ? "IN" : "OUT");
/* Fallback to default */
default:
ASSERT(0);
/* Fallback to default */
default:
ASSERT(0);