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sam3n port: add some peripheral register definitions.
[bertos.git]
/
bertos
/
cpu
/
cortex-m3
/
info
/
LM3S1968.cdef
diff --git
a/bertos/cpu/cortex-m3/info/LM3S1968.cdef
b/bertos/cpu/cortex-m3/info/LM3S1968.cdef
index 494042ccc5acc3926c3c72fd73088d8d6698a515..344923cbdc5120ada3444b05955b8b26003f8196 100644
(file)
--- a/
bertos/cpu/cortex-m3/info/LM3S1968.cdef
+++ b/
bertos/cpu/cortex-m3/info/LM3S1968.cdef
@@
-45,6
+45,7
@@
include("cm3.common")
# CPU type used for flashing/debugging
MK_PROGRAMMER_CPU = "lm3s"
# CPU type used for flashing/debugging
MK_PROGRAMMER_CPU = "lm3s"
+MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-lm3s.sh"
# CPU default clock frequency
CPU_DEFAULT_FREQ = "50000000UL"
# CPU default clock frequency
CPU_DEFAULT_FREQ = "50000000UL"
@@
-57,7
+58,10
@@
MK_CPU_CSRC += DRV_DIR + "gpio_lm3s.c " + DRV_DIR + "clock_lm3s.c "
# Short description of the cpu.
CPU_DESC += [ "256 Kbytes on-chip flash memory",
# Short description of the cpu.
CPU_DESC += [ "256 Kbytes on-chip flash memory",
- "64 Kbytes on-chip SRAM memory" ]
+ "64 Kbytes on-chip SRAM memory",
+ "3 UARTs interfaces",
+ "2 I2C interfaces",
+ "2 ADC x8 channel 10-bit" ]
# GCC flags for this cpu.
MK_CPU_CPPFLAGS += " -D__ARM_LM3S1968__"
# GCC flags for this cpu.
MK_CPU_CPPFLAGS += " -D__ARM_LM3S1968__"