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Move flash related flags to the flash driver; refactor accordingly.
[bertos.git]
/
bertos
/
cpu
/
cortex-m3
/
info
/
STM32F103RB.cdef
diff --git
a/bertos/cpu/cortex-m3/info/STM32F103RB.cdef
b/bertos/cpu/cortex-m3/info/STM32F103RB.cdef
index add4cea6293f4c6a339e719837c1ff558d8c4f2d..1358ab2eccd0aed38efd04a0ddf78105e97980f5 100644
(file)
--- a/
bertos/cpu/cortex-m3/info/STM32F103RB.cdef
+++ b/
bertos/cpu/cortex-m3/info/STM32F103RB.cdef
@@
-58,7
+58,10
@@
MK_CPU_CSRC += DRV_DIR + "gpio_stm32.c " + DRV_DIR + "clock_stm32.c "
# Short description of the cpu.
CPU_DESC += [ "128 Kbytes on-chip flash memory",
# Short description of the cpu.
CPU_DESC += [ "128 Kbytes on-chip flash memory",
- "20 Kbytes on-chip SRAM memory" ]
+ "20 Kbytes on-chip SRAM memory",
+ "2 UARTs interfaces",
+ "2 I2C interfaces",
+ "2 ADC x16 channel 12-bit" ]
# GCC flags for this cpu.
MK_CPU_CPPFLAGS += " -D__ARM_STM32F103RB__"
# GCC flags for this cpu.
MK_CPU_CPPFLAGS += " -D__ARM_STM32F103RB__"