-#define ADC_STARTUP_MASK 0x000F0000 ///< Start up timer mask.
-#define ADC_STARTUP_SHIFT 16 ///< Start up timer shift.
-#define ADC_SUT0 0 ///< 0 period of ADCClock.
-#define ADC_SUT1 1 ///< 8 period of ADCClock.
-#define ADC_SUT2 2 ///< 16 period of ADCClock.
-#define ADC_SUT3 3 ///< 24 period of ADCClock.
-#define ADC_SUT4 4 ///< 64 period of ADCClock.
-#define ADC_SUT5 5 ///< 80 period of ADCClock.
-#define ADC_SUT6 6 ///< 96 period of ADCClock.
-#define ADC_SUT7 7 ///< 112 period of ADCClock.
-#define ADC_SUT8 8 ///< 512 period of ADCClock.
-#define ADC_SUT9 9 ///< 576 period of ADCClock.
-#define ADC_SUT10 10 ///< 640 period of ADCClock.
-#define ADC_SUT11 11 ///< 704 period of ADCClock.
-#define ADC_SUT12 12 ///< 768 period of ADCClock.
-#define ADC_SUT13 13 ///< 832 period of ADCClock.
-#define ADC_SUT14 14 ///< 832 period of ADCClock.
-#define ADC_SUT15 15 ///< 896 period of ADCClock.
-#define ADC_SUT16 16 ///< 960 period of ADCClock.
-
-
-/**
- * Sample & hold time.
- */
-#define ADC_SHTIME_MASK 0x0F000000 ///< Sample & hold time mask.
-#define ADC_SHTIME_SHIFT 20 ///< Sample & hold time shift.
-#define ADC_AST3 0 ///< 3 period of ADCClock
-#define ADC_AST5 1 ///< 5 period of ADCClock
-#define ADC_AST9 2 ///< 9 period of ADCClock
-#define ADC_AST17 3 ///< 17 period of ADCClock
+#define ADC_STARTUP_MASK 0x000F0000 ///< Start up timer mask.
+#define ADC_STARTUP_SHIFT 16 ///< Start up timer shift.
+
+/**
+ * Start up timer.
+ * $WIZ$ sam3_adc_sut = "ADC_SUT0","ADC_SUT8","ADC_SUT16","ADC_SUT24","ADC_SUT64","DC_SUT80","ADC_SUT96","ADC_SUT112","ADC_SUT512","ADC_SUT576","ADC_SUT640","ADC_SUT704","ADC_SUT768","ADC_SUT832","ADC_SUT896","ADC_SUT960"
+ * \{
+ */
+#define ADC_SUT0 0 ///< 0 period of ADCClock.
+#define ADC_SUT8 1 ///< 8 period of ADCClock.
+#define ADC_SUT16 2 ///< 16 period of ADCClock.
+#define ADC_SUT24 3 ///< 24 period of ADCClock.
+#define ADC_SUT64 4 ///< 64 period of ADCClock.
+#define ADC_SUT80 5 ///< 80 period of ADCClock.
+#define ADC_SUT96 6 ///< 96 period of ADCClock.
+#define ADC_SUT112 7 ///< 112 period of ADCClock.
+#define ADC_SUT512 8 ///< 512 period of ADCClock.
+#define ADC_SUT576 9 ///< 576 period of ADCClock.
+#define ADC_SUT640 10 ///< 640 period of ADCClock.
+#define ADC_SUT704 11 ///< 704 period of ADCClock.
+#define ADC_SUT768 12 ///< 768 period of ADCClock.
+#define ADC_SUT832 13 ///< 832 period of ADCClock.
+#define ADC_SUT896 14 ///< 896 period of ADCClock.
+#define ADC_SUT960 15 ///< 896 period of ADCClock.
+/** \} */
+
+/**
+ * Analog Settling Time.
+ * $WIZ$ sam3_adc_stt = "ADC_AST3", "ADC_AST5", "ADC_AST9", "ADC_AST17"
+ */
+#define ADC_SETTLING_MASK 0x00300000 ///< Analog Settling Time mask.
+#define ADC_SETTLING_SHIFT 20 ///< Analog Settling Time shift.
+#define ADC_AST3 0 ///< 3 period of ADCClock
+#define ADC_AST5 1 ///< 5 period of ADCClock
+#define ADC_AST9 2 ///< 9 period of ADCClock
+#define ADC_AST17 3 ///< 17 period of ADCClock
+
+/**
+ * Tracking Time.
+ * Tracking Time = (TRACKTIM + 1) * ADCClock periods.
+ */
+#define ADC_TRACKTIM_MASK 0x0F000000 ///< Tracking Time mask.
+#define ADC_TRACKTIM_SHIFT 24 ///< Tracking Time shift.
+
+/**
+ * Transfer Period.
+ * Transfer Period = (TRANSFER * 2 + 3) ADCClock periods.
+ */
+#define ADC_TRANSFER_MASK 0x30000000 ///< Transfer Period mask.
+#define ADC_TRANSFER_SHIFT 28 ///< Transfer Period shift.