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Add Device ID Base Address register to the STM32 memory map.
[bertos.git]
/
bertos
/
cpu
/
cortex-m3
/
io
/
sam3_adc.h
diff --git
a/bertos/cpu/cortex-m3/io/sam3_adc.h
b/bertos/cpu/cortex-m3/io/sam3_adc.h
index 30bac49f8631ef43e8c343fef114e4aa513752e2..c855dc850d9bff03b97b006d27ce0b4c40874361 100644
(file)
--- a/
bertos/cpu/cortex-m3/io/sam3_adc.h
+++ b/
bertos/cpu/cortex-m3/io/sam3_adc.h
@@
-162,7
+162,7
@@
#define ADC_SR (*((reg32_t *)(ADC_BASE + ADC_SR_OFF))) ///< Status register address.
#define ADC_SR (*((reg32_t *)(ADC_BASE + ADC_SR_OFF))) ///< Status register address.
-#define ADC_CH_MASK 0x0000
00
FF ///< Channel mask.
+#define ADC_CH_MASK 0x0000
FF
FF ///< Channel mask.
#define ADC_CH0 0 ///< Channel 0
#define ADC_CH1 1 ///< Channel 1
#define ADC_CH2 2 ///< Channel 2
#define ADC_CH0 0 ///< Channel 0
#define ADC_CH1 1 ///< Channel 1
#define ADC_CH2 2 ///< Channel 2