+#include CPU_HEADER(dac)
+
+struct DacContext;
+struct Dac;
+
+typedef int (*DacWriteFunc_t) (struct Dac *dac, unsigned channel, uint16_t sample);
+typedef void (*SetChannelMaskFunc_t) (struct Dac *dac, uint32_t mask);
+typedef void (*SetSamplingRate_t) (struct Dac *dac, uint32_t rate);
+typedef void (*DmaConversionBufFunc_t) (struct Dac *dac, void *buf, size_t len);
+typedef bool (*DmaConversionIsFinished_t) (struct Dac *dac);
+typedef void (*DmaStartStreamingFunc_t) (struct Dac *dac, void *buf, size_t len, size_t slice_len);
+typedef void (*DmaStopFunc_t) (struct Dac *dac);
+typedef void (*DmaCallbackFunc_t) (struct Dac *dac, void *_buf, size_t len);
+
+typedef struct DacContext
+{
+ DacWriteFunc_t write;
+ SetChannelMaskFunc_t setCh;
+ SetSamplingRate_t setSampleRate;
+ DmaConversionBufFunc_t conversion;
+ DmaConversionIsFinished_t isFinished;
+ DmaStartStreamingFunc_t start;
+ DmaStopFunc_t stop;
+ DmaCallbackFunc_t callback;
+ size_t slice_len;
+
+ DB(id_t _type);
+
+} DacContext;
+
+typedef struct Dac
+{
+ DacContext ctx;
+ struct DacHardware *hw;
+} Dac;
+
+INLINE int dac_write(Dac *dac, unsigned channel, uint16_t sample)
+{
+ ASSERT(dac->ctx.write);
+ return dac->ctx.write(dac, channel, sample);
+}
+
+INLINE void dac_setChannelMask(struct Dac *dac, uint32_t mask)
+{
+ ASSERT(dac->ctx.setCh);
+ dac->ctx.setCh(dac, mask);
+}
+
+INLINE void dac_setSamplingRate(Dac *dac, uint32_t rate)
+{
+ ASSERT(dac->ctx.setSampleRate);
+ dac->ctx.setSampleRate(dac, rate);
+}