+
+/**
+ * \name I2C error flags
+ * \ingroup i2c_api
+ * @{
+ */
+#define I2C_OK 0 ///< I2C no errors flag
+#define I2C_DATA_NACK BV(4) ///< I2C generic error
+#define I2C_ERR BV(3) ///< I2C generic error
+#define I2C_ARB_LOST BV(2) ///< I2C arbitration lost error
+#define I2C_START_TIMEOUT BV(0) ///< I2C timeout error on start
+#define I2C_NO_ACK BV(1) ///< I2C no ack for sla start
+/**@}*/
+
+/**
+ * \name I2C command flags
+ * \ingroup i2c_api
+ * @{
+ */
+#define I2C_NOSTOP 0 ///< Do not program the stop for current transition
+#define I2C_STOP BV(0) ///< Program the stop for current transition
+/** @} */
+#define I2C_START_R BV(1) // Start read command
+#define I2C_START_W 0 // Start write command
+
+
+#define I2C_TEST_START(flag) ((flag) & I2C_START_R)
+#define I2C_TEST_STOP(flag) ((flag) & I2C_STOP)
+
+struct I2cHardware;
+struct I2c;
+
+typedef void (*i2c_start_t)(struct I2c *i2c, uint16_t slave_addr);
+typedef uint8_t (*i2c_getc_t)(struct I2c *i2c);
+typedef void (*i2c_putc_t)(struct I2c *i2c, uint8_t data);
+typedef void (*i2c_write_t)(struct I2c *i2c, const void *_buf, size_t count);
+typedef void (*i2c_read_t)(struct I2c *i2c, void *_buf, size_t count);
+
+typedef struct I2cVT
+{
+ i2c_start_t start;
+ i2c_getc_t getc;
+ i2c_putc_t putc;
+ i2c_write_t write;
+ i2c_read_t read;
+} I2cVT;
+
+typedef struct I2c
+{
+ int errors;
+ int flags;
+ size_t xfer_size;
+ struct I2cHardware* hw;
+ const struct I2cVT *vt;
+} I2c;
+
+
+#include CPU_HEADER(i2c)
+
+/*
+ * Low level i2c init implementation prototype.
+ */
+void i2c_hw_init(I2c *i2c, int dev, uint32_t clock);
+void i2c_hw_bitbangInit(I2c *i2c, int dev);
+
+void i2c_genericWrite(I2c *i2c, const void *_buf, size_t count);
+void i2c_genericRead(I2c *i2c, void *_buf, size_t count);
+
+/*
+ * Start a i2c transfer.
+ *
+ * \param i2c Context structure.
+ * \param slave_addr Address of slave device
+ * \param size Size of the transfer
+ */
+INLINE void i2c_start(I2c *i2c, uint16_t slave_addr, size_t size)
+{
+ ASSERT(i2c->vt);
+ ASSERT(i2c->vt->start);
+
+ if (!i2c->errors)
+ ASSERT(i2c->xfer_size == 0);
+
+ i2c->errors = 0;
+ i2c->xfer_size = size;
+
+ i2c->vt->start(i2c, slave_addr);
+}
+
+/**
+ * \name I2C interface functions
+ * \ingroup i2c_api
+ * @{
+ */
+
+/**
+ * Start a read session.
+ * \param i2c I2C context
+ * \param slave_addr Address of the slave device
+ * \param size Number of bytes to be read from device
+ * \param flags Session flags (I2C command flags)
+ */
+INLINE void i2c_start_r_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
+{
+ ASSERT(i2c);
+ i2c->flags = flags | I2C_START_R;
+ i2c_start(i2c, slave_addr, size);
+}
+
+/**
+ * Start a write session.
+ * \param i2c I2C context
+ * \param slave_addr Address of the slave device
+ * \param size Size to be transferred
+ * \param flags Session flags
+ */
+INLINE void i2c_start_w_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags)
+{
+ ASSERT(i2c);
+ i2c->flags = flags & ~I2C_START_R;
+ i2c_start(i2c, slave_addr, size);
+}
+
+/**
+ * Read a byte from I2C bus.
+ * \param i2c I2C context
+ * \return Byte read
+ */
+INLINE uint8_t i2c_getc(I2c *i2c)
+{
+ ASSERT(i2c);
+ ASSERT(i2c->vt);
+ ASSERT(i2c->vt->getc);
+
+ ASSERT(i2c->xfer_size);
+
+ ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_R);
+
+ if (!i2c->errors)
+ {
+ uint8_t data = i2c->vt->getc(i2c);
+ i2c->xfer_size--;
+ return data;
+ }
+ else
+ return 0xFF;
+}
+
+/**
+ * Write the byte \a data into I2C port \a i2c.
+ * \param i2c I2C context
+ * \param data Byte to be written
+ */
+INLINE void i2c_putc(I2c *i2c, uint8_t data)
+{
+ ASSERT(i2c);
+ ASSERT(i2c->vt);
+ ASSERT(i2c->vt->putc);
+
+ ASSERT(i2c->xfer_size);
+
+ ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_W);
+
+ if (!i2c->errors)
+ {
+ i2c->vt->putc(i2c, data);
+ i2c->xfer_size--;
+ }
+}
+
+/**
+ * Write \a count bytes to port \a i2c, reading from \a _buf.
+ * \param i2c I2C context
+ * \param _buf User buffer to read from
+ * \param count Number of bytes to write
+ */
+INLINE void i2c_write(I2c *i2c, const void *_buf, size_t count)
+{
+ ASSERT(i2c);
+ ASSERT(i2c->vt);
+ ASSERT(i2c->vt->write);
+
+ ASSERT(_buf);
+ ASSERT(count);
+ ASSERT(count <= i2c->xfer_size);
+
+ ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_W);
+
+ if (!i2c->errors)
+ i2c->vt->write(i2c, _buf, count);
+}
+
+/**
+ * Read \a count bytes into buffer \a _buf from device \a i2c.
+ * \param i2c Context structure
+ * \param _buf Buffer to fill
+ * \param count Number of bytes to read
+ */
+INLINE void i2c_read(I2c *i2c, void *_buf, size_t count)
+{
+ ASSERT(i2c);
+ ASSERT(i2c->vt);
+ ASSERT(i2c->vt->read);
+
+ ASSERT(_buf);
+ ASSERT(count);
+ ASSERT(count <= i2c->xfer_size);
+
+ ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_R);
+
+ if (!i2c->errors)
+ i2c->vt->read(i2c, _buf, count);
+}
+
+/**
+ * Return the error condition of the bus and clear errors.
+ */
+INLINE int i2c_error(I2c *i2c)
+{
+ ASSERT(i2c);
+ int err = i2c->errors;
+ i2c->errors = 0;
+
+ return err;
+}
+
+/**
+ * Initialize I2C context structure.
+ * \param i2c I2C context structure
+ * \param dev Number of device to be initialized. You can use I2C_BITBANG0
+ * and similar if you want to activate the bitbang driver.
+ * \param clock Peripheral clock
+ */
+#define i2c_init_3(i2c, dev, clock) ((((dev) >= I2C_BITBANG0) | ((dev) == I2C_BITBANG_OLD)) ? \
+ i2c_hw_bitbangInit((i2c), (dev)) : i2c_hw_init((i2c), (dev), (clock)))
+/**@}*/
+/**\}*/ // i2c_api
+
+/**
+ * \defgroup old_i2c_api Old I2C API
+ * \ingroup i2c_driver
+ *
+ * This is the old and deprecated I2C API. It is maintained for backward
+ * compatibility only, don't use it in new projects.
+ * @{
+ */
+#if !CONFIG_I2C_DISABLE_OLD_API
+
+/**
+ * \ingroup old_i2c_api
+ * \name I2C Backends.
+ * Sometimes your cpu does not have a builtin
+ * i2c driver or you don't want, for some reason, to
+ * use that.
+ * With this you can choose, at compile time, which backend to use.
+ * Set the CONFIG_I2C_BACKEND configuration variable in cfg_i2c.h
+ * @{
+ */