+ i2c_sdaHi(I2C_DEV(i2c));
+
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ i2c_sclHi(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ i2c_sclLo(I2C_DEV(i2c));
+ i2c_sdaHi(I2C_DEV(i2c));
+ }
+
+ /* Generate stop condition (if requested) */
+ if ((i2c->xfer_size == 1) && (i2c->flags & I2C_STOP))
+ i2c_bitbang_stop_1(i2c);
+
+ return data;
+}
+
+static void i2c_bitbang_putc(struct I2c *i2c, uint8_t _data)
+{
+ /* Add ACK bit */
+ uint16_t data = (_data << 1) | 1;
+ bool ack;
+
+ if (old_api)
+ {
+ for (uint16_t i = 0x100; i != 0; i >>= 1)
+ {
+ SCL_LO;
+ if (data & i)
+ SDA_HI;
+ else
+ SDA_LO;
+ I2C_HALFBIT_DELAY();
+
+ SCL_HI;
+ I2C_HALFBIT_DELAY();
+ }
+
+ ack = !SDA_IN;
+ SCL_LO;
+ I2C_HALFBIT_DELAY();
+ }
+ else
+ {
+ for (uint16_t i = 0x100; i != 0; i >>= 1)
+ {
+ i2c_sclLo(I2C_DEV(i2c));
+ if (data & i)
+ i2c_sdaHi(I2C_DEV(i2c));
+ else
+ i2c_sdaLo(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+
+ i2c_sclHi(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ }
+ ack = !i2c_sdaIn(I2C_DEV(i2c));
+
+ i2c_sclLo(I2C_DEV(i2c));
+ i2c_halfbitDelay(I2C_DEV(i2c));
+ }
+
+ if (!ack)
+ i2c->errors |= I2C_NO_ACK;
+
+ /* Generate stop condition (if requested) */
+ if (((i2c->xfer_size == 1) && (i2c->flags & I2C_STOP)) || i2c->errors)
+ i2c_bitbang_stop_1(i2c);
+}
+
+
+static void i2c_bitbang_start_2(struct I2c *i2c, uint16_t slave_addr)
+{
+ if (i2c->flags & I2C_START_R)
+ slave_addr |= I2C_READBIT;
+ else
+ slave_addr &= ~I2C_READBIT;
+
+ /*
+ * Loop on the select write sequence: when the device is busy
+ * writing previously sent data it will reply to the SLA_W
+ * control byte with a NACK. In this case, we must
+ * keep trying until the deveice responds with an ACK.
+ */
+ ticks_t start = timer_clock();
+ while (i2c_bitbang_start_1(i2c))
+ {
+ i2c_bitbang_putc(i2c, slave_addr);
+
+ if (!(i2c->errors & I2C_NO_ACK))
+ return;
+ else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
+ {
+ LOG_ERR("Timeout on I2C start\n");
+ i2c->errors |= I2C_START_TIMEOUT;
+ i2c_bitbang_stop_1(i2c);
+ return;
+ }