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Fix bug in set serial param; remove some unneeded reg set in init function.
[bertos.git]
/
cpu
/
arm
/
drv
/
ser_at91.c
diff --git
a/cpu/arm/drv/ser_at91.c
b/cpu/arm/drv/ser_at91.c
index 2d7205973d3733921db7cc78062e8a4d4955f951..f64eb0f88a7adbb6c03294e05a597e6fc0f98574 100644
(file)
--- a/
cpu/arm/drv/ser_at91.c
+++ b/
cpu/arm/drv/ser_at91.c
@@
-203,36
+203,34
@@
static void uart0_init(
UNUSED_ARG(struct SerialHardware *, _hw),
UNUSED_ARG(struct Serial *, ser))
{
UNUSED_ARG(struct SerialHardware *, _hw),
UNUSED_ARG(struct Serial *, ser))
{
+ /* Disable all interrupt */
+ US0_IDR = 0xFFFFFFFF;
/* Set the vector. */
AIC_SVR(US0_ID) = serirq_dispatcher;
/* Initialize to edge triggered with defined priority. */
AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
/* Set the vector. */
AIC_SVR(US0_ID) = serirq_dispatcher;
/* Initialize to edge triggered with defined priority. */
AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
- /* Clear pending interrupt */
- AIC_ICCR = BV(US0_ID);
- /* Enable the system IRQ */
+ /* Enable the USART IRQ */
AIC_IECR = BV(US0_ID);
/* Enable UART clock. */
PMC_PCER = BV(US0_ID);
/* Disable GPIO on UART tx/rx pins. */
AIC_IECR = BV(US0_ID);
/* Enable UART clock. */
PMC_PCER = BV(US0_ID);
/* Disable GPIO on UART tx/rx pins. */
- PIOA_PDR = BV(PA5_RXD1_A) | BV(PA6_TXD1_A);
+ PIOA_PDR = BV(5) | BV(6);
+
+ /* Set serial param: mode Normal, 8bit data, 1bit stop */
+ US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1;
/* Reset UART. */
US0_CR = BV(US_RSTRX) | BV(US_RSTTX);
/* Reset UART. */
US0_CR = BV(US_RSTRX) | BV(US_RSTTX);
-
- /* Set serial param: mode Normal, 8bit data, 1bit stop */
- US0_MR |= US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1;
-
/* Enable Tx and Rx */
US0_CR = BV(US_RXEN) | BV(US_TXEN);
/* Enable Tx and Rx */
US0_CR = BV(US_RXEN) | BV(US_TXEN);
+ /* Enable Tx and Rx interrupt*/
US0_IER = BV(US_RXRDY) | BV(US_TXRDY);
US0_IER = BV(US_RXRDY) | BV(US_TXRDY);
- /* enable GPIO on UART tx/rx pins. */
- PIOA_PER = BV(PA5_RXD1_A) | BV(PA6_TXD1_A);
}
}