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Replace IPTR with iptr_t.
[bertos.git]
/
cpu.h
diff --git
a/cpu.h
b/cpu.h
index 6e550631f364bc345c3abadeb04f69a71ab4834f..6042d9e06b42e00fdf184bd292858fc3a6e05d31 100755
(executable)
--- a/
cpu.h
+++ b/
cpu.h
@@
-17,6
+17,12
@@
/*#*
*#* $Log$
/*#*
*#* $Log$
+ *#* Revision 1.22 2004/11/16 21:57:59 bernie
+ *#* CPU_IDLE: Rename from SCHEDULER_IDLE.
+ *#*
+ *#* Revision 1.21 2004/11/16 21:34:25 bernie
+ *#* Commonize obsolete names for IRQ macros; Doxygen fixes.
+ *#*
*#* Revision 1.20 2004/11/16 20:33:32 bernie
*#* CPU_HARVARD: New macro.
*#*
*#* Revision 1.20 2004/11/16 20:33:32 bernie
*#* CPU_HARVARD: New macro.
*#*
@@
-57,19
+63,23
@@
#include "compiler.h" /* for uintXX_t, PP_CAT3(), PP_STRINGIZE() */
#include "compiler.h" /* for uintXX_t, PP_CAT3(), PP_STRINGIZE() */
-// Macros for determining CPU endianness
+/*!
+ * \name Macros for determining CPU endianness.
+ * \{
+ */
#define CPU_BIG_ENDIAN 0x1234
#define CPU_LITTLE_ENDIAN 0x3412
#define CPU_BIG_ENDIAN 0x1234
#define CPU_LITTLE_ENDIAN 0x3412
+/*\}*/
-/
/ Macros to include cpu-specific version of the headers
+/
*! Macro to include cpu-specific versions of the headers. */
#define CPU_HEADER(module) PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
#if CPU_I196
#define CPU_HEADER(module) PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
#if CPU_I196
- #define DISABLE_INTS disable_interrupt()
- #define ENABLE_INTS enable_interrupt()
#define NOP nop_instruction()
#define NOP nop_instruction()
+ #define IRQ_DISABLE disable_interrupt()
+ #define IRQ_ENABLE enable_interrupt()
typedef uint16_t cpuflags_t; // FIXME
typedef unsigned int cpustack_t;
typedef uint16_t cpuflags_t; // FIXME
typedef unsigned int cpustack_t;
@@
-84,8
+94,8
@@
#elif CPU_X86
#define NOP asm volatile ("nop")
#elif CPU_X86
#define NOP asm volatile ("nop")
- #define
DISABLE_INTS
/* nothing */
- #define
ENABLE_INTS
/* nothing */
+ #define
IRQ_DISABLE
/* nothing */
+ #define
IRQ_ENABLE
/* nothing */
typedef uint32_t cpuflags_t; // FIXME
typedef uint32_t cpustack_t;
typedef uint32_t cpuflags_t; // FIXME
typedef uint32_t cpustack_t;
@@
-100,14
+110,15
@@
#elif CPU_DSP56K
#define NOP asm(nop)
#elif CPU_DSP56K
#define NOP asm(nop)
- #define
DISABLE_INTS
do { asm(bfset #0x0200,SR); asm(nop); } while (0)
- #define
ENABLE_INTS
do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
+ #define
IRQ_DISABLE
do { asm(bfset #0x0200,SR); asm(nop); } while (0)
+ #define
IRQ_ENABLE
do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
- #define
DISABLE_IRQSAV
E(x) \
+ #define
IRQ_SAVE_DISABL
E(x) \
do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
- #define
ENABLE_IRQ
RESTORE(x) \
+ #define
IRQ_
RESTORE(x) \
do { (void)x; asm(move x,SR); } while (0)
do { (void)x; asm(move x,SR); } while (0)
+
typedef uint16_t cpuflags_t;
typedef unsigned int cpustack_t;
typedef uint16_t cpuflags_t;
typedef unsigned int cpustack_t;
@@
-117,7
+128,6
@@
#define CPU_STACK_GROWS_UPWARD 1
#define CPU_SP_ON_EMPTY_SLOT 0
#define CPU_BYTE_ORDER CPU_BIG_ENDIAN
#define CPU_STACK_GROWS_UPWARD 1
#define CPU_SP_ON_EMPTY_SLOT 0
#define CPU_BYTE_ORDER CPU_BIG_ENDIAN
- #define CPU_HARVARD 1
/* Memory is word-addessed in the DSP56K */
#define CPU_BITS_PER_CHAR 16
/* Memory is word-addessed in the DSP56K */
#define CPU_BITS_PER_CHAR 16
@@
-158,12
+168,6
@@
(bool)(sreg & 0x80); \
})
(bool)(sreg & 0x80); \
})
- /* OBSOLETE NAMES */
- #define DISABLE_INTS IRQ_DISABLE
- #define ENABLE_INTS IRQ_ENABLE
- #define DISABLE_IRQSAVE(x) IRQ_SAVE_DISABLE(x)
- #define ENABLE_IRQRESTORE(x) IRQ_RESTORE(x)
-
typedef uint8_t cpuflags_t;
typedef uint8_t cpustack_t;
typedef uint8_t cpuflags_t;
typedef uint8_t cpustack_t;
@@
-174,7
+178,6
@@
#define CPU_STACK_GROWS_UPWARD 0
#define CPU_SP_ON_EMPTY_SLOT 1
#define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
#define CPU_STACK_GROWS_UPWARD 0
#define CPU_SP_ON_EMPTY_SLOT 1
#define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
- #define CPU_HARVARD 1
/*!
* Initialization value for registers in stack frame.
/*!
* Initialization value for registers in stack frame.
@@
-186,6
+189,12
@@
#endif
#endif
+/* OBSOLETE NAMES */
+#define DISABLE_INTS IRQ_DISABLE
+#define ENABLE_INTS IRQ_ENABLE
+#define DISABLE_IRQSAVE(x) IRQ_SAVE_DISABLE(x)
+#define ENABLE_IRQRESTORE(x) IRQ_RESTORE(x)
+
/*!
* Execute \a CODE atomically with respect to interrupts.
*
/*!
* Execute \a CODE atomically with respect to interrupts.
*
@@
-250,7
+259,8
@@
#if CPU_DSP56K
#if CPU_DSP56K
- /* DSP56k pushes both PC and SR to the stack in the JSR instruction, but
+ /*
+ * DSP56k pushes both PC and SR to the stack in the JSR instruction, but
* RTS discards SR while returning (it does not restore it). So we push
* 0 to fake the same context.
*/
* RTS discards SR while returning (it does not restore it). So we push
* 0 to fake the same context.
*/
@@
-261,7
+271,8
@@
} while (0);
#elif CPU_AVR
} while (0);
#elif CPU_AVR
- /* In AVR, the addresses are pushed into the stack as little-endian, while
+ /*
+ * In AVR, the addresses are pushed into the stack as little-endian, while
* memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
* no natural endianess).
*/
* memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
* no natural endianess).
*/
@@
-360,16
+371,19
@@
STATIC_ASSERT(sizeof(int) == SIZEOF_INT);
* profile system load with an external strobe, or to save CPU cycles
* in hosted environments such as emulators.
*/
* profile system load with an external strobe, or to save CPU cycles
* in hosted environments such as emulators.
*/
-#ifndef
SCHEDULER
_IDLE
+#ifndef
CPU
_IDLE
#if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
/* This emulator hook should yield the CPU to the host. */
EXTERN_C_BEGIN
void SchedulerIdle(void);
EXTERN_C_END
#if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
/* This emulator hook should yield the CPU to the host. */
EXTERN_C_BEGIN
void SchedulerIdle(void);
EXTERN_C_END
- #define
SCHEDULER
_IDLE SchedulerIdle()
+ #define
CPU
_IDLE SchedulerIdle()
#else /* !ARCH_EMUL */
#else /* !ARCH_EMUL */
- #define
SCHEDULER
_IDLE do { /* nothing */ } while (0)
+ #define
CPU
_IDLE do { /* nothing */ } while (0)
#endif /* !ARCH_EMUL */
#endif /* !ARCH_EMUL */
-#endif /* !SCHEDULER_IDLE */
+#endif /* !CPU_IDLE */
+
+/* OBSOLETE */
+#define SCHEDULER_IDLE CPU_IDLE
#endif /* DEVLIB_CPU_H */
#endif /* DEVLIB_CPU_H */