-#include <mware/byteorder.h> /* cpu_to_be16() */
-#include <drv/kdebug.h>
-#include <hw.h>
-
-#include <avr/twi.h>
-
-
-/* Wait for TWINT flag set: bus is ready */
-#define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
-
-/*! \name EEPROM control codes */
-/*@{*/
-#define SLA_W 0xA0
-#define SLA_R 0xA1
-/*@}*/
-
-
-/*!
- * Send START condition on the bus.
- *
- * \return true on success, false otherwise.
- */
-static bool twi_start(void)
-{
- TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
- WAIT_TWI_READY;
-
- if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
- return true;
-
- DB(kprintf("!TW_(REP)START: %x\n", TWSR);)
- return false;
-}
-
-
-/*!
- * Send START condition and select slave for write.
- *
- * \return true on success, false otherwise.
- */
-static bool twi_start_w(uint8_t slave_addr)
-{
- //TRACE;
-
- /* Do a loop on the select write sequence because if the
- * eeprom is busy writing precedently sent data it will respond
- * with NACK to the SLA_W control byte. In this case we have
- * to try until the eeprom reply with an ACK.
- */
- while (twi_start())
- {
- TWDR = SLA_W | ((slave_addr & 0x5) << 1);
- TWCR = BV(TWINT) | BV(TWEN);
- WAIT_TWI_READY;
-
- if (TW_STATUS == TW_MT_SLA_ACK)
- return true;
- else if (TW_STATUS != TW_MT_SLA_NACK)
- {
- DB(kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);)
- break;
- }
- }
-
- return false;
-}
-
-
-/*!
- * Send START condition and select slave for read.
- *
- * \return true on success, false otherwise.
- */
-static bool twi_start_r(uint8_t slave_addr)
-{
- //TRACE;
-
- if (twi_start())
- {
- TWDR = SLA_R | ((slave_addr & 0x5) << 1);
- TWCR = BV(TWINT) | BV(TWEN);
- WAIT_TWI_READY;
-
- if (TW_STATUS == TW_MR_SLA_ACK)
- return true;
-
- DB(kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);)
- }