Minor fixes in AT91 ADC module.

[bertos.git] / bertos / cfg / cfg_adc.h

diff --git a/bertos/cfg/cfg_adc.h b/bertos/cfg/cfg_adc.h
index 6172d0320c891a30aaf185f0c0b1e6dd3c2f08ef..35e5866188083612981dd9564c00c186b7d833e7 100644 (file)
--- a/bertos/cfg/cfg_adc.h
+++ b/bertos/cfg/cfg_adc.h
@@ -57,9 +57,12 @@
 
 /**
  * Clock Frequency for ADC conversion.
+ * This frequency will be rounded down to an integer
+ * submultiple of CPU_FREQ.
  *
  * $WIZ$ type = "int"
  * $WIZ$ supports = "at91"
+ * $WIZ$ max = 5000000
  */
 #define CONFIG_ADC_CLOCK        4800000UL
 
@@ -67,16 +70,16 @@
  * Minimum time for starting up a conversion [us].
  *
  * $WIZ$ type = "int"
- * $WIZ$ min = "0"
+ * $WIZ$ min = 20
  * $WIZ$ supports = "at91"
  */
 #define CONFIG_ADC_STARTUP_TIME 20
 
 /**
- * Minimum time for sample and hold [us].
+ * Minimum time for sample and hold [ns].
  *
  * $WIZ$ type = "int"
- * $WIZ$ min = "0"
+ * $WIZ$ min = 600
  * $WIZ$ supports = "at91"
  */
 #define CONFIG_ADC_SHTIME       834
@@ -94,8 +97,8 @@
  * ADC clock divisor from main crystal.
  *
  * $WIZ$ type = "int"
- * $WIZ$ min = "2"
- * $WIZ$ max = "128"
+ * $WIZ$ min = 2
+ * $WIZ$ max = 128
  * $WIZ$ supports = "avr"
  */
 #define CONFIG_ADC_AVR_DIVISOR  2