Minor fixes in AT91 ADC module.

[bertos.git] / bertos / cpu / arm / drv / adc_at91.c

diff --git a/bertos/cpu/arm/drv/adc_at91.c b/bertos/cpu/arm/drv/adc_at91.c
index b98e129025ea699195f501be839f617548f68856..4ac358616a89a49821c20dfd1b620f7d8e54f360 100644 (file)
--- a/bertos/cpu/arm/drv/adc_at91.c
+++ b/bertos/cpu/arm/drv/adc_at91.c
@@ -50,7 +50,8 @@
 #include <cpu/irq.h>
 
 #include "cfg/cfg_adc.h"
-#include "cfg/cfg_kern.h"
+#include "cfg/cfg_proc.h"
+#include "cfg/cfg_signal.h"
 #include <cfg/macros.h>
 #include <cfg/compiler.h>
 
@@ -83,9 +84,9 @@
         * ADC ISR.
         * Simply signal the adc process that convertion is complete.
         */
-       static void ISR_FUNC adc_conversion_end_irq(void)
+       static DECLARE_ISR(adc_conversion_end_irq)
        {
-               sig_signal(adc_process, SIG_ADC_COMPLETE);
+               sig_post(adc_process, SIG_ADC_COMPLETE);
 
                /* Inform hw that we have served the IRQ */
                AIC_EOICR = 0;
@@ -113,7 +114,7 @@
  * Select mux channel \a ch.
  * \todo only first 8 channels are selectable!
  */
-INLINE void adc_hw_select_ch(uint8_t ch)
+void adc_hw_select_ch(uint8_t ch)
 {
        //Disable all channels
        ADC_CHDR = ADC_CH_MASK;
@@ -125,13 +126,13 @@ INLINE void adc_hw_select_ch(uint8_t ch)
 /**
  * Start an ADC convertion.
  * If a kernel is present, preempt until convertion is complete, otherwise
- * a busy wait on ADCS bit is done.
+ * a busy wait on ADC_DRDY bit is done.
  */
-INLINE uint16_t adc_hw_read(void)
+uint16_t adc_hw_read(void)
 {
-       ASSERT(!(ADC_SR & ADC_EOC_MASK));
-
        #if CONFIG_KERN
+               /* Ensure ADC is not already in use by another process */
+               ASSERT(adc_process == NULL);
                adc_process = proc_current();
        #endif
 
@@ -142,19 +143,25 @@ INLINE uint16_t adc_hw_read(void)
                // Ensure IRQs enabled.
                IRQ_ASSERT_ENABLED();
                sig_wait(SIG_ADC_COMPLETE);
+
+               /* Prevent race condition in case of preemptive kernel */
+               uint16_t ret = ADC_LCDR;
+               MEMORY_BARRIER;
+               adc_process = NULL;
+               return ret;
        #else
                //Wait in polling until is done
                while (!(ADC_SR & BV(ADC_DRDY)));
-       #endif
 
-       //Return the last converted data
-       return(ADC_LCDR);
+               //Return the last converted data
+               return(ADC_LCDR);
+       #endif
 }
 
 /**
  * Init ADC hardware.
  */
-INLINE void adc_hw_init(void)
+void adc_hw_init(void)
 {
        //Init ADC pins.
        ADC_INIT_PINS();
@@ -177,6 +184,7 @@ INLINE void adc_hw_init(void)
        #endif
        /* \} */
 
+       LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_COMPUTED_CLOCK);
        LOG_INFO("prescaler[%ld], stup[%ld], shtim[%ld]\n",ADC_COMPUTED_PRESCALER, ADC_COMPUTED_STARTUPTIME,  ADC_COMPUTED_SHTIME);
 
 
@@ -194,7 +202,7 @@ INLINE void adc_hw_init(void)
        ADC_MR &= ~ADC_SHTIME_MASK;
        ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
        LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
-
+       
        #if CONFIG_KERN
                //Register and enable irq for adc.
                adc_enable_irq();