* \brief ARM UART and SPI I/O driver
*
*
- * \version $Id: ser_at91.c 20881 2008-03-04 14:07:02Z batt $
+ * \version $Id$
* \author Daniele Basile <asterix@develer.com>
*/
#include "hw/hw_ser.h" /* Required for bus macros overrides */
-#include "hw/hw_cpu.h" /* CLOCK_FREQ */
+#include <hw/hw_cpufreq.h> /* CPU_FREQ */
#include "cfg/cfg_ser.h"
#include <cfg/debug.h>
volatile bool sending;
};
-
-
-#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
-struct Serial *ser_spi1 = &ser_handles[SER_SPI1];
-#endif
-
static void uart0_irq_dispatcher(void);
static void uart1_irq_dispatcher(void);
static void spi0_irq_handler(void);
static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
{
/* Compute baud-rate period */
- US0_BRGR = CLOCK_FREQ / (16 * rate);
+ US0_BRGR = CPU_FREQ / (16 * rate);
//DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
}
static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
{
/* Compute baud-rate period */
- US1_BRGR = CLOCK_FREQ / (16 * rate);
+ US1_BRGR = CPU_FREQ / (16 * rate);
//DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
}
{
SPI0_CSR0 &= ~SPI_SCBR;
- ASSERT((uint8_t)DIV_ROUND(CLOCK_FREQ, rate));
- SPI0_CSR0 |= DIV_ROUND(CLOCK_FREQ, rate) << SPI_SCBR_SHIFT;
+ ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate));
+ SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
}
#if CPU_ARM_AT91SAM7X128 || CPU_ARM_AT91SAM7X256
IRQ_SAVE_DISABLE(flags);
/* Send data only if the SPI is not already transmitting */
- if (!hw->sending && !fifo_isempty(&ser_spi1->txfifo))
+ if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI1]->txfifo))
{
hw->sending = true;
- SPI1_TDR = fifo_pop(&ser_spi1->txfifo);
+ SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo);
}
IRQ_RESTORE(flags);
{
SPI1_CSR0 &= ~SPI_SCBR;
- ASSERT((uint8_t)DIV_ROUND(CLOCK_FREQ, rate));
- SPI1_CSR0 |= DIV_ROUND(CLOCK_FREQ, rate) << SPI_SCBR_SHIFT;
+ ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate));
+ SPI1_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT;
}
#endif
char c = SPI1_RDR;
/* Read incoming byte. */
- if (!fifo_isfull(&ser_spi1->rxfifo))
- fifo_push(&ser_spi1->rxfifo, c);
+ if (!fifo_isfull(&ser_handles[SER_SPI1]->rxfifo))
+ fifo_push(&ser_handles[SER_SPI1]->rxfifo, c);
/*
* FIXME
else
- ser_spi1->status |= SERRF_RXFIFOOVERRUN;
+ ser_handles[SER_SPI1]->status |= SERRF_RXFIFOOVERRUN;
*/
/* Send */
- if (!fifo_isempty(&ser_spi1->txfifo))
- SPI1_TDR = fifo_pop(&ser_spi1->txfifo);
+ if (!fifo_isempty(&ser_handles[SER_SPI1]->txfifo))
+ SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo);
else
UARTDescs[SER_SPI1].sending = false;