Add other error flag. Include platform specific header.
[bertos.git] / bertos / cpu / attr.h
index 5e24fa3c9d3ee7b57ae6d19ad36212f2798789a5..798969901cbcc59f1d626b99f522a6435b2f8ec4 100644 (file)
        /// Valid pointers should be >= than this value (used for debug)
        #if CPU_ARM_AT91
                #define CPU_RAM_START           0x00200000
+       #elif CPU_ARM_LPC2
+               #define CPU_RAM_START           0x40000000
        #else
                #warning Fix CPU_RAM_START address for your ARM, default value set to 0x200
                #define CPU_RAM_START           0x200
 #elif CPU_CM3
 
        #define CPU_REG_BITS           32
-       #define CPU_REGS_CNT           fixme
+       #define CPU_REGS_CNT           16
        #define CPU_HARVARD            0
 
        /// Valid pointers should be >= than this value (used for debug)
-       #if CPU_CM3_LM3S1968
+       #if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32F103RB)
                #define CPU_RAM_START 0x20000000
        #else
                #warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x200
        #elif defined(__ARMEL__)
                #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
        #else
-               #error Unable to detect Cortex-M3 endianness!
+               #error Unable to detect Cortex-M3 endianess!
        #endif
 
-       #define NOP         fixme
+       #define NOP         asm volatile ("nop")
+       #define PAUSE       asm volatile ("wfi" ::: "memory")
        #define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
 
 #elif CPU_PPC
                #define CPU_RAM_START       0x60
        #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
                #define CPU_RAM_START       0x100
-       #elif CPU_AVR_ATMEGA1281
+       #elif CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280
                #define CPU_RAM_START       0x200
        #else
                #warning Fix CPU_RAM_START address for your AVR, default value set to 0x100