Remove broken debug uart name.

[bertos.git] / bertos / cpu / avr / drv / adc_avr.c

diff --git a/bertos/cpu/avr/drv/adc_avr.c b/bertos/cpu/avr/drv/adc_avr.c
index 2ba5982fe1da47c477c54474e2999ded7e0b43e4..9a6f2d395f96460673ebadeee7c5f2f84d4bbbab 100644 (file)
--- a/bertos/cpu/avr/drv/adc_avr.c
+++ b/bertos/cpu/avr/drv/adc_avr.c
@@ -31,7 +31,6 @@
  *
  * \brief ADC hardware-specific definition
  *
- * \version $Id$
  * \author Francesco Sacchi <batt@develer.com>
  *
  * This module is automatically included so no need to include
@@ -89,7 +88,7 @@
         */
        ISR(ADC_vect)
        {
-               sig_signal(adc_process, SIG_ADC_COMPLETE);
+               sig_post(adc_process, SIG_ADC_COMPLETE);
        }
 #endif /* CONFIG_KERN */
 
@@ -97,7 +96,7 @@
  * Select mux channel \a ch.
  * \todo only first 8 channels are selectable!
  */
-INLINE void adc_hw_select_ch(uint8_t ch)
+void adc_hw_select_ch(uint8_t ch)
 {
        /* Set to 0 all mux registers */
        ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
@@ -112,7 +111,7 @@ INLINE void adc_hw_select_ch(uint8_t ch)
  * If a kernel is present, preempt until convertion is complete, otherwise
  * a busy wait on ADCS bit is done.
  */
-INLINE uint16_t adc_hw_read(void)
+uint16_t adc_hw_read(void)
 {
        // Ensure another convertion is not running.
        ASSERT(!(ADCSRA & BV(ADSC)));
@@ -136,7 +135,7 @@ INLINE uint16_t adc_hw_read(void)
 /**
  * Init ADC hardware.
  */
-INLINE void adc_hw_init(void)
+void adc_hw_init(void)
 {
        /*
         * Select channel 0 as default,