sam3n: update clock and kdebug modules to use lastest register definion convention

[bertos.git] / bertos / cpu / avr / drv / adc_avr.c

diff --git a/bertos/cpu/avr/drv/adc_avr.c b/bertos/cpu/avr/drv/adc_avr.c
index 9a6f2d395f96460673ebadeee7c5f2f84d4bbbab..c42f8e3ba4f9c6ae67db243790e8542f38883575 100644 (file)
--- a/bertos/cpu/avr/drv/adc_avr.c
+++ b/bertos/cpu/avr/drv/adc_avr.c
@@ -99,10 +99,28 @@
 void adc_hw_select_ch(uint8_t ch)
 {
        /* Set to 0 all mux registers */
-       ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
+       #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA168
+               ADMUX &= ~(BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
+       #elif CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 \
+             || CPU_AVR_ATMEGA1280
+               ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0));
+               #if CPU_AVR_ATMEGA1280
+                       ADCSRB &= ~(BV(MUX5));
+               #endif
+       #else
+               #error Unknown CPU
+       #endif
 
-       /* Select channel, only first 8 channel modes are supported for now */
+       /* Select channel, only first 8 channel modes are supported */
        ADMUX |= (ch & 0x07);
+
+       #if CPU_AVR_ATMEGA1280
+               /* Select channel, all 16 channels are supported */
+               if (ch > 0x07)
+                       ADCSRB |= BV(MUX5);
+
+       #endif
+
 }