* the GNU General Public License.
*
* Copyright 2003, 2004, 2005 Develer S.r.l. (http://www.develer.com/)
- * Copyright 2000 Bernardo Innocenti <bernie@develer.com>
+ * Copyright 2000 Bernie Innocenti <bernie@codewiz.org>
*
* -->
*
*
* \version $Id$
*
- * \author Bernardo Innocenti <bernie@develer.com>
+ * \author Bernie Innocenti <bernie@codewiz.org>
* \author Francesco Sacchi <batt@develer.com>
*
*/
*
* Select which hardware timer interrupt to use for system clock and softtimers.
* \note The timer 1 overflow mode set the timer as a 24 kHz PWM.
- *
- * \{
+ * $WIZ$ timer_select = "TIMER_ON_OUTPUT_COMPARE0", "TIMER_ON_OVERFLOW1", "TIMER_ON_OUTPUT_COMPARE2", "TIMER_ON_OVERFLOW3", "TIMER_DEFAULT"
*/
#define TIMER_ON_OUTPUT_COMPARE0 1
#define TIMER_ON_OVERFLOW1 2
#define TIMER_ON_OVERFLOW3 4
#define TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0 ///< Default system timer
-/* \} */
/*
* Hardware dependent timer initialization.
#define TIMER_PRESCALER 64
#define TIMER_HW_BITS 8
- #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE0)
+ #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
+ #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE0A)
+ #else
+ #define DEFINE_TIMER_ISR SIGNAL(SIG_OUTPUT_COMPARE0)
+ #endif
#define TIMER_TICKS_PER_SEC 1000
#define TIMER_HW_CNT OCR_DIVISOR