Add asrc, csrc, cxxsrc, cppasrc taken from the cpu definition in the makefile

[bertos.git] / bertos / cpu / avr / drv / timer_avr.h

diff --git a/bertos/cpu/avr/drv/timer_avr.h b/bertos/cpu/avr/drv/timer_avr.h
index 9da9dbe6578b45c96376fa131a2ce76b26963257..1eccd0efcd501abc7f6e256b635aa2ad0711c3b7 100644 (file)
--- a/bertos/cpu/avr/drv/timer_avr.h
+++ b/bertos/cpu/avr/drv/timer_avr.h
@@ -55,8 +55,7 @@
  *
  * Select which hardware timer interrupt to use for system clock and softtimers.
  * \note The timer 1 overflow mode set the timer as a 24 kHz PWM.
- *
- * \{
+ * $WIZ$ timer_select = "TIMER_ON_OUTPUT_COMPARE0", "TIMER_ON_OVERFLOW1", "TIMER_ON_OUTPUT_COMPARE2", "TIMER_ON_OVERFLOW3", "TIMER_DEFAULT"
  */
 #define TIMER_ON_OUTPUT_COMPARE0  1
 #define TIMER_ON_OVERFLOW1        2
@@ -64,7 +63,6 @@
 #define TIMER_ON_OVERFLOW3        4
 
 #define TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0 ///< Default system timer
-/* \} */
 
 /*
  * Hardware dependent timer initialization.
@@ -73,7 +71,11 @@
 
        #define TIMER_PRESCALER      64
        #define TIMER_HW_BITS        8
-       #define DEFINE_TIMER_ISR     SIGNAL(SIG_OUTPUT_COMPARE0)
+       #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
+               #define DEFINE_TIMER_ISR     SIGNAL(SIG_OUTPUT_COMPARE0A)
+       #else
+               #define DEFINE_TIMER_ISR     SIGNAL(SIG_OUTPUT_COMPARE0)
+       #endif
        #define TIMER_TICKS_PER_SEC  1000
        #define TIMER_HW_CNT         OCR_DIVISOR