sam3n port: add some peripheral register definitions.

[bertos.git] / bertos / cpu / cortex-m3 / drv / clock_sam3.c

diff --git a/bertos/cpu/cortex-m3/drv/clock_sam3.c b/bertos/cpu/cortex-m3/drv/clock_sam3.c
index 737bdf670cb809958a037ed0b28c1dc730c38528..25f0f986188be5a812763046453a693b1c7053f6 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/clock_sam3.c
+++ b/bertos/cpu/cortex-m3/drv/clock_sam3.c
@@ -89,6 +89,9 @@ void clock_init(void)
 {
        uint32_t timeout;
 
+       /* Disable watchdog */
+       WDT_MR = WDT_MR_WDDIS;
+
        /* Set 4 wait states for flash access, needed for higher CPU clock rates */
        EFC_FMR = EEFC_FMR_FWS(3);