#include <cfg/macros.h>
#include <cpu/types.h>
+#include <drv/irq_cm3.h>
+
+typedef void (*dmac_handler_t)(uint32_t status);
/**
* DMA Transfer Descriptor as well as Linked List Item
{
uint32_t src_addr; ///< Source buffer address
uint32_t dst_addr; ///< Destination buffer address
- uint32_t ctrl_a; ///< Control A register settings
- uint32_t ctrl_b; ///< Control B register settings
+ uint32_t ctrla; ///< Control A register settings
+ uint32_t ctrlb; ///< Control B register settings
uint32_t dsc_addr; ///< Next descriptor address
} DmacDesc;
typedef struct Dmac
{
+ DmacDesc lli;
uint8_t errors;
size_t transfer_size;
+ dmac_handler_t handler;
} Dmac;
#define DMAC_ERR_CH_ALREDY_ON BV(0)
-void dmac_setSources(Dmac *dmac, uint8_t ch, uint32_t src, uint32_t dst, size_t transfer_size);
-void dmac_configureDmac(Dmac *dmac, uint8_t ch, uint32_t cfg, uint32_t ctrla, uint32_t ctrlb);
-int dmac_start(Dmac *dmac, uint8_t ch);
-bool dmac_isDone(Dmac *dmac, uint8_t ch);
-bool dmac_waitDone(Dmac *dmac, uint8_t ch);
-
-void dmac_init(Dmac *dmac);
+void dmac_setLLITransfer(int ch, DmacDesc *lli, uint32_t cfg);
+void dmac_setSources(int ch, uint32_t src, uint32_t dst);
+void dmac_configureDmac(int ch, size_t transfer_size, uint32_t cfg, uint32_t ctrla, uint32_t ctrlb);
+int dmac_start(int ch);
+void dmac_stop(int ch);
+int dmac_error(int ch);
+bool dmac_enableCh(int ch, dmac_handler_t handler);
+void dmac_init(void);
#endif /* DRV_DMAC_SAM3_H */