* \author Stefano Fedrigo <aleph@develer.com>
*/
+#include "eth_sam3.h"
#include "cfg/cfg_eth.h"
#define LOG_LEVEL ETH_LOG_LEVEL
#include <cfg/macros.h>
#include <cfg/compiler.h>
-// TODO: unify includes
-//#include <io/at91sam7.h>
-//#include <io/arm.h>
-//#include <io/include.h>
-#include <io/sam3.h>
+#include <io/cm3.h>
+
#include <drv/irq_cm3.h>
+#include <drv/timer.h>
+#include <drv/eth.h>
#include <cpu/power.h>
#include <cpu/types.h>
#include <cpu/irq.h>
-#include <drv/timer.h>
-#include <drv/eth.h>
-
#include <mware/event.h>
#include <string.h>
-#include "eth_sam3.h"
-
#define EMAC_RX_INTS (BV(EMAC_RCOMP) | BV(EMAC_ROVR) | BV(EMAC_RXUBR))
#define EMAC_TX_INTS (BV(EMAC_TCOMP) | BV(EMAC_TXUBR) | BV(EMAC_RLEX))
-/*
- * MAC address configuration (please change this in your project!).
- *
- * TODO: make this paramater user-configurable from the Wizard.
- */
-const uint8_t mac_addr[] = { 0x00, 0x23, 0x54, 0x6a, 0x77, 0x55 };
-
/* Silent Doxygen bug... */
#ifndef __doxygen__
/*
/* Read interrupt status and disable interrupts. */
uint32_t isr = EMAC_ISR;
- kprintf("irq: %x\n", isr);
-
/* Receiver interrupt */
if ((isr & EMAC_RX_INTS))
{
- kprintf("emac: rx %x\n", isr);
if (isr & BV(EMAC_RCOMP))
event_do(&recv_wait);
EMAC_RSR = EMAC_RX_INTS;
if (isr & EMAC_TX_INTS)
{
if (isr & BV(EMAC_TCOMP))
- {
- kprintf("emac: tcomp\n");
event_do(&send_wait);
- }
- if (isr & BV(EMAC_RLEX))
- kprintf("emac: rlex\n");
EMAC_TSR = EMAC_TX_INTS;
}
//AIC_EOICR = 0;
return (uint16_t)(EMAC_MAN & EMAC_DATA);
}
+#if 0
/*
* \brief Write value to PHY register.
*
while (!(EMAC_NSR & BV(EMAC_IDLE)))
cpu_relax();
}
+#endif
-static int emac_reset(void)
+/*
+ * Check link speed and duplex as negotiated by the PHY
+ * and configure CPU EMAC accordingly.
+ * Requires active PHY maintenance mode.
+ */
+static void emac_autoNegotiation(void)
{
- uint16_t phy_cr;
- unsigned i;
+ uint16_t reg;
+ time_t start;
+
+ // Wait for auto-negotation to complete
+ start = timer_clock();
+ do {
+ reg = phy_hw_read(NIC_PHY_ADDR, NIC_PHY_BMSR);
+ if (timer_clock() - start > 2000)
+ {
+ kprintf("eth error: auto-negotiation timeout\n");
+ return;
+ }
+ }
+ while (!(reg & NIC_PHY_BMSR_ANCOMPL));
+
+ reg = phy_hw_read(NIC_PHY_ADDR, NIC_PHY_ANLPAR);
+
+ if ((reg & NIC_PHY_ANLPAR_TX_FDX) || (reg & NIC_PHY_ANLPAR_TX_HDX))
+ {
+ LOG_INFO("eth: 100BASE-TX\n");
+ EMAC_NCFGR |= BV(EMAC_SPD);
+ }
+ else
+ {
+ LOG_INFO("eth: 10BASE-T\n");
+ EMAC_NCFGR &= ~BV(EMAC_SPD);
+ }
+ if ((reg & NIC_PHY_ANLPAR_TX_FDX) || (reg & NIC_PHY_ANLPAR_10_FDX))
+ {
+ LOG_INFO("eth: full duplex\n");
+ EMAC_NCFGR |= BV(EMAC_FD);
+ }
+ else
+ {
+ LOG_INFO("eth: half duplex\n");
+ EMAC_NCFGR &= ~BV(EMAC_FD);
+ }
+}
+
+
+static int emac_reset(void)
+{
#if CPU_ARM_AT91
// Enable devices
PMC_PCER = BV(PIOA_ID);
pmc_periphEnable(PIOD_ID);
pmc_periphEnable(EMAC_ID);
- // Disable TESTMODE and RMII
- PIOC_PUDR = BV(PHY_RXDV_TESTMODE_BIT);
-
- // Disable PHY power down.
- PIOD_PER = BV(PHY_PWRDN_BIT);
- PIOD_OER = BV(PHY_PWRDN_BIT);
- PIOD_CODR = BV(PHY_PWRDN_BIT);
+ // Disable TESTMODE
+ PIOB_PUDR = BV(PHY_RXDV_TESTMODE_BIT);
#endif
- // Toggle external hardware reset pin.
- RSTC_MR = RSTC_KEY | (1 << RSTC_ERSTL_SHIFT) | BV(RSTC_URSTEN);
- RSTC_CR = RSTC_KEY | BV(RSTC_EXTRST);
-
- while ((RSTC_SR & BV(RSTC_NRSTL)) == 0)
- cpu_relax();
-
// Configure MII ports.
#if CPU_ARM_AT91
PIOB_ASR = PHY_MII_PINS;
PIO_PERIPH_SEL(PIOB_BASE, PHY_MII_PINS_PORTB, PIO_PERIPH_A);
PIOB_PDR = PHY_MII_PINS_PORTB;
- PIO_PERIPH_SEL(PIOC_BASE, PHY_MII_PINS_PORTC, PIO_PERIPH_A);
- PIOC_PDR = PHY_MII_PINS_PORTC;
-
// Enable receive, transmit clocks and RMII mode.
EMAC_USRIO = BV(EMAC_CLKEN) | BV(EMAC_RMII);
#endif
(mac_addr[1] << 8) | mac_addr[0];
EMAC_SA1H = (mac_addr[5] << 8) | mac_addr[4];
- // Wait for PHY ready
- timer_delay(500);
-
-#if 0 // debug test
- for (;;)
- {
- for (i = 0; i < 32; i++)
- {
- // Clear MII isolate.
- phy_hw_read(i, NIC_PHY_BMCR);
- phy_cr = phy_hw_read(i, NIC_PHY_BMCR);
-
- phy_cr &= ~NIC_PHY_BMCR_ISOLATE;
- phy_hw_write(i, NIC_PHY_BMCR, phy_cr);
-
- phy_cr = phy_hw_read(i, NIC_PHY_BMCR);
-
- LOG_INFO("%s: PHY ID %d %#04x %#04x\n",
- __func__, i,
- phy_hw_read(i, NIC_PHY_ID1), phy_hw_read(i, NIC_PHY_ID2));
- }
- timer_delay(1000);
- }
-#endif
-
- // Clear MII isolate.
- //phy_hw_read(NIC_PHY_ADDR, NIC_PHY_BMCR);
- phy_cr = phy_hw_read(NIC_PHY_ADDR, NIC_PHY_BMCR);
-
- phy_cr &= ~NIC_PHY_BMCR_ISOLATE;
- phy_hw_write(NIC_PHY_ADDR, NIC_PHY_BMCR, phy_cr);
-
- //phy_cr = phy_hw_read(NIC_PHY_ADDR, NIC_PHY_BMCR);
-
- LOG_INFO("%s: PHY ID %#04x %#04x\n",
- __func__,
- phy_hw_read(NIC_PHY_ADDR, NIC_PHY_ID1), phy_hw_read(NIC_PHY_ADDR, NIC_PHY_ID2));
+ emac_autoNegotiation();
// Disable management port.
EMAC_NCR &= ~BV(EMAC_MPE);
return 0;
}
+
static int emac_start(void)
{
uint32_t addr;
projects / bertos.git / blobdiff