lm3s1968: generic UART driver.

[bertos.git] / bertos / cpu / cortex-m3 / drv / gpio_lm3s.c

diff --git a/bertos/cpu/cortex-m3/drv/gpio_lm3s.c b/bertos/cpu/cortex-m3/drv/gpio_lm3s.c
index 770e55b4fd376283d228fae3dcdf68d4303fed8e..653fd1e99e18676d9198507ffbf7fcd0630607bc 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/gpio_lm3s.c
+++ b/bertos/cpu/cortex-m3/drv/gpio_lm3s.c
@@ -37,30 +37,12 @@
 
 #include <cfg/compiler.h>
 #include <cfg/debug.h>
-#include "io/lm3s.h"
+#include <io/lm3s.h>
 #include "gpio_lm3s.h"
 
-/* Write a value to the specified pin(s) */
-void lm3s_gpio_pin_write(uint32_t port, uint8_t pins, uint8_t val)
+/* Set the pin(s) direction and mode */
+INLINE int lm3s_gpioPinConfigMode(uint32_t port, uint8_t pins, uint32_t mode)
 {
-       HWREG(port + (GPIO_O_DATA + (pins << 2))) = val;
-}
-
-/**
- * Configure a GPIO pin
- *
- * @port: the base address of the GPIO port
- * @pins: the bit-packed representation of the pin(s)
- * @mode: the pin(s) configuration mode
- * @strength: the output drive strength
- * @type: the pin(s) type
- *
- * Return 0 on success, otherwise a negative value.
- */
-int lm3s_gpio_pin_config(uint32_t port, uint8_t pins,
-               uint32_t mode, uint32_t strength, uint32_t type)
-{
-       /* Set the pin direction and mode */
        switch (mode)
        {
        case GPIO_DIR_MODE_IN:
@@ -79,7 +61,13 @@ int lm3s_gpio_pin_config(uint32_t port, uint8_t pins,
                ASSERT(0);
                return -1;
        }
-       /* Set the output strength */
+       return 0;
+}
+
+/* Set the pin(s) output strength */
+INLINE int
+lm3s_gpioPinConfigStrength(uint32_t port, uint8_t pins, uint32_t strength)
+{
        switch (strength)
        {
        case GPIO_STRENGTH_2MA:
@@ -110,9 +98,21 @@ int lm3s_gpio_pin_config(uint32_t port, uint8_t pins,
                ASSERT(0);
                return -1;
        }
-       /* Set the pin type */
+       return 0;
+}
+
+/* Set the pin(s) type */
+INLINE int lm3s_gpioPinConfigType(uint32_t port, uint8_t pins, uint32_t type)
+{
        switch (type)
        {
+       case GPIO_PIN_TYPE_ANALOG:
+               HWREG(port + GPIO_O_ODR)   &= ~pins;
+               HWREG(port + GPIO_O_PUR)   &= ~pins;
+               HWREG(port + GPIO_O_PDR)   &= ~pins;
+               HWREG(port + GPIO_O_DEN)   &= ~pins;
+               HWREG(port + GPIO_O_AMSEL) |= pins;
+               break;
        case GPIO_PIN_TYPE_STD:
                HWREG(port + GPIO_O_ODR)   &= ~pins;
                HWREG(port + GPIO_O_PUR)   &= ~pins;
@@ -155,15 +155,37 @@ int lm3s_gpio_pin_config(uint32_t port, uint8_t pins,
                HWREG(port + GPIO_O_DEN)   |= pins;
                HWREG(port + GPIO_O_AMSEL) &= ~pins;
                break;
-       case GPIO_PIN_TYPE_ANALOG:
-               HWREG(port + GPIO_O_ODR)   &= ~pins;
-               HWREG(port + GPIO_O_PUR)   &= ~pins;
-               HWREG(port + GPIO_O_PDR)   &= ~pins;
-               HWREG(port + GPIO_O_DEN)   &= ~pins;
-               HWREG(port + GPIO_O_AMSEL) |= pins;
        default:
                ASSERT(0);
                return -1;
        }
        return 0;
 }
+
+/**
+ * Configure a GPIO pin
+ *
+ * \param port Base address of the GPIO port
+ * \param pins Bit-packed representation of the pin(s)
+ * \param mode Pin(s) configuration mode
+ * \param strength Output drive strength
+ * \param type Pin(s) type
+ *
+ * Return 0 on success, otherwise a negative value.
+ */
+int lm3s_gpioPinConfig(uint32_t port, uint8_t pins,
+               uint32_t mode, uint32_t strength, uint32_t type)
+{
+       int ret;
+
+       ret = lm3s_gpioPinConfigMode(port, pins, mode);
+       if (UNLIKELY(ret < 0))
+               return ret;
+       ret = lm3s_gpioPinConfigStrength(port, pins, strength);
+       if (UNLIKELY(ret < 0))
+               return ret;
+       ret = lm3s_gpioPinConfigType(port, pins, type);
+       if (UNLIKELY(ret < 0))
+               return ret;
+       return 0;
+}