HSMCI_ARGR = argument;
HSMCI_CMDR = index | reply_type | BV(HSMCI_CMDR_MAXLAT);
- uint32_t status = HSMCI_SR;
- while (!(status & BV(HSMCI_SR_CMDRDY)))
- {
+ uint32_t status;
+ do {
+ status = HSMCI_SR;
+
if (status & HSMCI_RESP_ERROR_MASK)
return status;
cpu_relax();
- status = HSMCI_SR;
- }
+ } while (!(status & BV(HSMCI_SR_CMDRDY)));
return 0;
}
else
HSMCI_CFG &= ~BV(HSMCI_CFG_HSMODE);
- HSMCI_DTOR = 0xF8 | HSMCI_DTOR_DTOMUL_1;
- HSMCI_CSTOR = 0xF8 | HSMCI_CSTOR_CSTOMUL_1;
- HSMCI_MR = HSMCI_CLK_DIV(data_rate) | BV(HSMCI_MR_RDPROOF) | BV(HSMCI_MR_WRPROOF);
+ HSMCI_MR = HSMCI_CLK_DIV(data_rate);
timer_delay(10);
}
HSMCI_DTOR = 0xFF | HSMCI_DTOR_DTOMUL_1048576;
HSMCI_CSTOR = 0xFF | HSMCI_CSTOR_CSTOMUL_1048576;
- HSMCI_MR = HSMCI_CLK_DIV(HSMCI_INIT_SPEED) | BV(HSMCI_MR_RDPROOF) | BV(HSMCI_MR_WRPROOF);
+ HSMCI_MR = HSMCI_CLK_DIV(HSMCI_INIT_SPEED);
HSMCI_CFG = BV(HSMCI_CFG_FIFOMODE) | BV(HSMCI_CFG_FERRCTRL);
HSMCI_CR = BV(HSMCI_CR_MCIEN);