Set correct hight speed.

[bertos.git] / bertos / cpu / cortex-m3 / drv / hsmci_sam3.h

diff --git a/bertos/cpu/cortex-m3/drv/hsmci_sam3.h b/bertos/cpu/cortex-m3/drv/hsmci_sam3.h
index 9e41c016eba00093bac1c50b27907728601d602d..322e36c45fde91a8a37a63b87faee12d2667f007 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/hsmci_sam3.h
+++ b/bertos/cpu/cortex-m3/drv/hsmci_sam3.h
@@ -38,33 +38,10 @@
 #ifndef DRV_HSMCI_SAM3_H
 #define DRV_HSMCI_SAM3_H
 
-#include <io/cm3.h>
 #include <cfg/macros.h>
+#include <cfg/debug.h>
 
-#define CMD8_V_RANGE_CHECK_PAT    0xAA
-#define CMD8_V_RANGE_27V_36V      (0x100 | CMD8_V_RANGE_CHECK_PAT)
-#define CMD8_V_RANGE_LOW          (0x1000 | CMD8_V_RANGE_CHECK_PAT)
-#define CMD8_V_ECHO_REPLY         0xFF
-#define CMD8_SUPP_V_RANGE_REPLY   0xFF00
-
-
-#define SD_OCR_CCS              BV(30)     /**< SD Card Capacity Status (CCS) */
-#define SD_OCR_BUSY             BV(31)     /**< SD/MMC Card power up status bit (busy) */
-
-#define SD_OCR_VDD_27_28        BV(15)
-#define SD_OCR_VDD_28_29        BV(16)
-#define SD_OCR_VDD_29_30        BV(17)
-#define SD_OCR_VDD_30_31        BV(18)
-#define SD_OCR_VDD_31_32        BV(19)
-#define SD_OCR_VDD_32_33        BV(20)
-
-
-#define SD_HOST_VOLTAGE_RANGE     (SD_OCR_VDD_27_28 | \
-                                   SD_OCR_VDD_28_29 | \
-                                   SD_OCR_VDD_29_30 | \
-                                   SD_OCR_VDD_30_31 | \
-                                   SD_OCR_VDD_31_32 | \
-                                   SD_OCR_VDD_32_33)
+#include <io/cm3.h>
 
 #define HSMCI_CHECK_BUSY() \
        do { \
@@ -72,6 +49,10 @@
        } while (!(HSMCI_SR & BV(HSMCI_SR_NOTBUSY)))
 
 
+#define HSMCI_INIT_SPEED  400000
+#define HSMCI_HIGH_SPEED  25000000
+
+#define HSMCI_HS_MODE     BV(0)
 
 typedef struct Hsmci
 {
@@ -87,9 +68,27 @@ INLINE void hsmci_disableIrq(void)
        HSMCI_IDR = BV(HSMCI_IER_RTOE);
 }
 
-void hsmci_readResp(void *resp, size_t len);
+INLINE void hsmci_setBusWidth(size_t len)
+{
+       int sdcsel= 0;
+       if (len == 4)
+               sdcsel = 2;
+       if (len == 8)
+               sdcsel = 3;
+
+       HSMCI_SDCR = (sdcsel << HSMCI_SDCR_SDCBUS_SHIFT) & HSMCI_SDCR_SDCBUS_MASK;
+}
+
+void hsmci_readResp(uint32_t *resp, size_t len);
 bool hsmci_sendCmd(uint8_t index, uint32_t argument, uint32_t reply_type);
 
+void hsmci_read(uint32_t *buf, size_t word_num, size_t blk_size);
+void hsmci_write(const uint32_t *buf, size_t word_num, size_t blk_size);
+void hsmci_waitTransfer(void);
+
+void hsmci_setSpeed(uint32_t data_rate, int flag);
+
+
 void hsmci_init(Hsmci *hsmci);
 
 #endif /* DRV_HSMCI_SAM3_H */