MT29F NAND driver: implement bad block handling and remapping.

[bertos.git] / bertos / cpu / cortex-m3 / drv / irq_cm3.c

diff --git a/bertos/cpu/cortex-m3/drv/irq_cm3.c b/bertos/cpu/cortex-m3/drv/irq_cm3.c
index bbae832428fdd870274040234448f471eb7b2667..14311d9567b56cabb60a0316aa5be74d7f99c289 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/irq_cm3.c
+++ b/bertos/cpu/cortex-m3/drv/irq_cm3.c
@@ -41,8 +41,14 @@
 #include <cfg/log.h> /* LOG_ERR() */
 #include <cpu/irq.h>
 
+
+#ifdef __IAR_SYSTEMS_ICC__
+#pragma data_alignment=0x400
+static void (*irq_table[NUM_INTERRUPTS])(void);
+#else
 static void (*irq_table[NUM_INTERRUPTS])(void)
                        __attribute__((section("vtable")));
+#endif
 
 /* Priority register / IRQ number table */
 static const uint32_t nvic_prio_reg[] =
@@ -62,7 +68,11 @@ static NAKED NORETURN void unhandled_isr(void)
 {
        register uint32_t reg;
 
+#ifdef __IAR_SYSTEMS_ICC__
+       reg = CPU_READ_IPSR();
+#else
        asm volatile ("mrs %0, ipsr" : "=r"(reg));
+#endif
        LOG_ERR("unhandled IRQ %lu\n", reg);
        while (1)
                PAUSE;