CM3: introduce sysirq_setPriority().

[bertos.git] / bertos / cpu / cortex-m3 / drv / irq_lm3s.c

diff --git a/bertos/cpu/cortex-m3/drv/irq_lm3s.c b/bertos/cpu/cortex-m3/drv/irq_lm3s.c
index c1df50193b9fd34e958b65a957204ec4f2df4e96..370fbab01ac92a6216f8693504101743ea5106c1 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/irq_lm3s.c
+++ b/bertos/cpu/cortex-m3/drv/irq_lm3s.c
@@ -35,7 +35,8 @@
  * \author Andrea Righi <arighi@develer.com>
  */
 
-#include <cfg/debug.h>
+#include <cfg/debug.h> /* ASSERT() */
+#include <cfg/log.h> /* LOG_ERR() */
 #include <cpu/irq.h>
 #include "io/lm3s.h"
 #include "irq_lm3s.h"
@@ -43,10 +44,39 @@
 static void (*irq_table[NUM_INTERRUPTS])(void)
                        __attribute__((section("vtable")));
 
-static void unhandled_isr(void)
+/* Unhandled IRQ */
+static NAKED NORETURN void unhandled_isr(void)
 {
-       /* Unhandled IRQ */
-       ASSERT(0);
+       register uint32_t reg;
+
+       asm volatile ("mrs %0, ipsr" : "=r"(reg));
+       LOG_ERR("unhandled IRQ %lu\n", reg);
+       while (1)
+               PAUSE;
+}
+
+void sysirq_setPriority(sysirq_t irq, int prio)
+{
+       uint32_t pos = (irq & 3) * 8;
+       reg32_t reg;
+
+       switch (irq >> 2)
+       {
+       case 1:
+               reg = NVIC_SYS_PRI1;
+               break;
+       case 2:
+               reg = NVIC_SYS_PRI2;
+               break;
+       case 3:
+               reg = NVIC_SYS_PRI3;
+               break;
+       default:
+               ASSERT(0);
+               return;
+       }
+       HWREG(reg) &= ~(0xff << pos);
+       HWREG(reg) |= prio << pos;
 }
 
 void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
@@ -57,6 +87,7 @@ void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler)
 
        IRQ_SAVE_DISABLE(flags);
        irq_table[irq] = handler;
+       sysirq_setPriority(irq, IRQ_PRIO);
        IRQ_RESTORE(flags);
 }