MT29F NAND flash driver: add block erase function.

[bertos.git] / bertos / cpu / cortex-m3 / drv / kdebug_sam3.c

diff --git a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
index 3edf1305c934f18e7faa91baa3767fc6d182a1ba..45b2cf59598c1d077b11af362d392b9200c9a1b2 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
+++ b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c
@@ -38,18 +38,22 @@
 #include <cfg/cfg_debug.h>
 #include <cfg/macros.h> /* for BV() */
 
+#include <cpu/types.h>
+
 #include <io/sam3.h>
 
 
-#if CONFIG_KDEBUG_PORT == 0
+#if (CONFIG_KDEBUG_PORT == 0)
        #define UART_BASE       UART0_BASE
        #define UART_ID         UART0_ID
-       #define UART_PIO_BASE   PIOA_BASE
+       #define UART_PIO_BASE   UART0_PORT
+       #define UART_PERIPH     UART0_PERIPH
        #define UART_PINS       (BV(URXD0) | BV(UTXD0))
 #elif (CONFIG_KDEBUG_PORT == 1) && UART_PORTS > 1
        #define UART_BASE       UART1_BASE
        #define UART_ID         UART1_ID
-       #define UART_PIO_BASE   PIOB_BASE
+       #define UART_PIO_BASE   UART1_PORT
+       #define UART_PERIPH     UART1_PERIPH
        #define UART_PINS       (BV(URXD1) | BV(UTXD1))
 #else
        #error "UART port not supported in this board"
@@ -77,10 +81,10 @@ INLINE void kdbg_hw_init(void)
         * SAM3X,A,N,S,U: all of them has all UARTs on peripheral A.
         */
        HWREG(UART_PIO_BASE + PIO_PDR_OFF) = UART_PINS;
-       PIO_PERIPH_SEL(UART_PIO_BASE, UART_PINS, PIO_PERIPH_A);
+       PIO_PERIPH_SEL(UART_PIO_BASE, UART_PINS, UART_PERIPH);
 
        /* Enable the peripheral clock */
-       PMC_PCER = BV(UART_ID);
+       pmc_periphEnable(UART_ID);
 
        /* Reset and disable receiver & transmitter */
        HWREG(UART_BASE + UART_CR_OFF) = BV(UART_CR_RSTRX) | BV(UART_CR_RSTTX) | BV(UART_CR_RXDIS) | BV(UART_CR_TXDIS);