* \author Andrea Righi <arighi@develer.com>
*/
-#include <cfg/macros.h> /* for BV() */
-#include <cfg/cfg_debug.h>
-#include <drv/gpio_stm32.h>
-#include <drv/clock_stm32.h> /* RCC */
-#include <io/stm32.h>
#include "kdebug_stm32.h"
-#define CR1_RUN_SET ((uint16_t)0x2000) /* USART Enable MASK */
-#define CR1_RUN_RESET ((uint16_t)0xDFFF) /* USART Disable MASK */
-#define CR1_RWU_SET ((uint16_t)0x0002) /* USART mute mode Enable MASK */
-#define CR1_RWU_RESET ((uint16_t)0xFFFD) /* USART mute mode Enable MASK */
-#define CR1_SBK_SET ((uint16_t)0x0001) /* USART Break Character send MASK */
-#define CR1_CLEAR_MASK ((uint16_t)0xE9F3) /* USART CR1 MASK */
-
-#define CR2_MASK ((uint16_t)0xFFF0) /* USART address MASK */
-#define CR2_LINE_SET ((uint16_t)0x4000) /* USART LIN Enable MASK */
-#define CR2_LINE_RESET ((uint16_t)0xBFFF) /* USART LIN Disable MASK */
-#define CR2_CLEAR_MASK ((uint16_t)0xC0FF) /* USART CR2 MASK */
-
-#define CR3_SCEN_SET ((uint16_t)0x0020) /* USART SC Enable MASK */
-#define CR3_SCEN_RESET ((uint16_t)0xFFDF) /* USART SC Disable MASK */
-#define CR3_NACK_SET ((uint16_t)0x0010) /* USART SC NACK Enable MASK */
-#define CR3_NACK_RESET ((uint16_t)0xFFEF) /* USART SC NACK Disable MASK */
-#define CR3_HDSEL_SET ((uint16_t)0x0008) /* USART Half-Duplex Enable MASK */
-#define CR3_HDSEL_RESET ((uint16_t)0xFFF7) /* USART Half-Duplex Disable MASK */
-#define CR3_IRLP_MASK ((uint16_t)0xFFFB) /* USART IrDA LowPower mode MASK */
-#define CR3_LBDL_MASK ((uint16_t)0xFFDF) /* USART LIN Break detection MASK */
-#define CR3_WAKE_MASK ((uint16_t)0xF7FF) /* USART WakeUp Method MASK */
-#define CR3_IREN_SET ((uint16_t)0x0002) /* USART IrDA Enable MASK */
-#define CR3_IREN_RESET ((uint16_t)0xFFFD) /* USART IrDA Disable MASK */
-#define CR3_CLEAR_MASK ((uint16_t)0xFCFF) /* USART CR3 MASK */
-
-#define GTPR_LSB_MASK ((uint16_t)0x00FF) /* Guard Time Register LSB MASK */
-#define GTPR_MSB_MASK ((uint16_t)0xFF00) /* Guard Time Register MSB MASK */
-
-#define USART_IT_MASK ((uint16_t)0x001F) /* USART Interrupt MASK */
-
-/* USART flags */
-#define USART_FLAG_CTS ((uint16_t)0x0200)
-#define USART_FLAG_LBD ((uint16_t)0x0100)
-#define USART_FLAG_TXE ((uint16_t)0x0080)
-#define USART_FLAG_TC ((uint16_t)0x0040)
-#define USART_FLAG_RXNE ((uint16_t)0x0020)
-#define USART_FLAG_IDLE ((uint16_t)0x0010)
-#define USART_FLAG_ORE ((uint16_t)0x0008)
-#define USART_FLAG_NE ((uint16_t)0x0004)
-#define USART_FLAG_FE ((uint16_t)0x0002)
-#define USART_FLAG_PE ((uint16_t)0x0001)
+#include <cfg/cfg_debug.h>
-/* USART registers */
-struct stm32_usart
-{
- reg16_t SR;
- uint16_t _RESERVED0;
- reg16_t DR;
- uint16_t _RESERVED1;
- reg16_t BRR;
- uint16_t _RESERVED2;
- reg16_t CR1;
- uint16_t _RESERVED3;
- reg16_t CR2;
- uint16_t _RESERVED4;
- reg16_t CR3;
- uint16_t _RESERVED5;
- reg16_t GTPR;
- uint16_t _RESERVED6;
-};
+#include <drv/gpio_stm32.h>
+#include <drv/clock_stm32.h> /* RCC */
-/* USART mode */
-#define USART_MODE_RX ((uint16_t)0x0004)
-#define USART_MODE_TX ((uint16_t)0x0008)
+#include <io/stm32.h>
-/* USART last bit */
-#define USART_LASTBIT_DISABLE ((uint16_t)0x0000)
-#define USART_LASTBIT_ENABLE ((uint16_t)0x0100)
-#if CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU
#if CONFIG_KDEBUG_PORT == 0
#define UART_BASE ((struct stm32_usart *)USART1_BASE)
typedef uint32_t kdbg_irqsave_t;
-#else
-#error CONFIG_KDEBUG_PORT should be KDEBUG_PORT_DBGU
-#endif
-
-#define GPIO_USART1_TX_PIN (1 << 9)
-#define GPIO_USART1_RX_PIN (1 << 10)
-
-#define GPIO_USART2_TX_PIN (1 << 2)
-#define GPIO_USART2_RX_PIN (1 << 3)
-
-#define GPIO_USART3_TX_PIN (1 << 13)
-#define GPIO_USART3_RX_PIN (1 << 14)
-
-INLINE uint16_t evaluate_brr(void)
-{
- uint32_t reg, div, frac;
-
- /* XXX: PCLK1 has been configured as CPU_FREQ / 2 */
- div = (0x19 * CPU_FREQ / 2) / (0x04 * CONFIG_KDEBUG_BAUDRATE);
- reg = (div / 0x64) << 0x04;
- frac = div - (0x64 * (reg >> 0x04));
- reg |= ((frac * 0x10 + 0x32) / 0x64) & 0x0f;
-
- return (uint16_t)reg;
-}
/* Initialize UART debug port */
INLINE void kdbg_hw_init(void)
RCC->APB2ENR |= RCC_APB2_GPIOA;
RCC->APB2ENR |= RCC_APB2_USART1;
stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, GPIO_USART1_TX_PIN,
- GPIO_SPEED_50MHZ, GPIO_MODE_AF_PP);
+ GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ);
#elif CONFIG_KDEBUG_PORT == 1
RCC->APB2ENR |= RCC_APB2_GPIOA;
RCC->APB1ENR |= RCC_APB1_USART2;
stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, GPIO_USART2_TX_PIN,
- GPIO_SPEED_50MHZ, GPIO_MODE_AF_PP);
+ GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ);
#elif CONFIG_KDEBUG_PORT == 2
RCC->APB2ENR |= RCC_APB2_GPIOB;
- RCC->APB2ENR |= RCC_APB1_USART3;
+ RCC->APB1ENR |= RCC_APB1_USART3;
stm32_gpioPinConfig((struct stm32_gpio *)GPIOB_BASE, GPIO_USART3_TX_PIN,
- GPIO_SPEED_50MHZ, GPIO_MODE_AF_PP);
+ GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ);
#else
#error "UART port not supported in this board"
#endif
/* Enable the USART by writing the UE bit */
UART_BASE->CR1 |= CR1_RUN_SET;
/* Configure the desired baud rate */
- UART_BASE->BRR = evaluate_brr();
+ UART_BASE->BRR = (uint16_t)evaluate_brr(UART_BASE, CPU_FREQ, CONFIG_KDEBUG_BAUDRATE);
/* Set the Transmitter Enable bit in CR1 */
UART_BASE->CR1 |= USART_MODE_TX;
}
projects / bertos.git / blobdiff