mt29f NAND driver: fix I/O pin numbers and row/column addressing.

[bertos.git] / bertos / cpu / cortex-m3 / drv / mt29f_sam3.h

diff --git a/bertos/cpu/cortex-m3/drv/mt29f_sam3.h b/bertos/cpu/cortex-m3/drv/mt29f_sam3.h
index a6108b06a489c66e21b36b5e3374ab619679745e..2d2d7353361d8acb3deb40508f3c7b653a508370 100644 (file)
--- a/bertos/cpu/cortex-m3/drv/mt29f_sam3.h
+++ b/bertos/cpu/cortex-m3/drv/mt29f_sam3.h
@@ -38,9 +38,14 @@
 #ifndef MT29F_SAM3_H
 #define MT29F_SAM3_H
 
+#include <drv/mt29f.h>
+
+
 // MT29F2G08AAD, FIXME: configurable
-#define MT29F_PAGE_SIZE  2048
-#define MT29F_SIZE       0x10000000  // 256 MB
+#define MT29F_PAGE_SIZE   0x800       // 2048 B
+#define MT29F_BLOCK_SIZE  0x20000     // 128 kB
+#define MT29F_SIZE        0x10000000  // 256 MB
+#define MT29F_CSID        NFC_CMD_CSID_0  // Chip select
 
 /*
  * PIO definitions.
@@ -56,10 +61,11 @@
 #define MT29F_PINS_PORTC    (MT29F_PIN_OE | MT29F_PIN_WE | MT29F_PIN_IO)
 #define MT29F_PERIPH_PORTC  PIO_PERIPH_A
 
-#define MT29F_PIN_CLE       BV(22)
-#define MT29F_PIN_ALE       BV(21)
+#define MT29F_PIN_CLE       BV(9)
+#define MT29F_PIN_ALE       BV(8)
 #define MT29F_PINS_PORTD    (MT29F_PIN_CLE | MT29F_PIN_ALE)
 #define MT29F_PERIPH_PORTD  PIO_PERIPH_A
 
+
 #endif /* MT29F_SAM3_H */