CM3: use a distinct stack for handler-mode and thread-mode.

[bertos.git] / bertos / cpu / cortex-m3 / hw / switch_ctx_cm3.S

diff --git a/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.S b/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.S
index bda6793cda4d4a1e01c8a56f4767038e85eb7ea3..e464d613ef5b382a49b535095f3e32e49d5479c6 100644 (file)
--- a/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.S
+++ b/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.S
@@ -35,20 +35,24 @@
  * \author Andrea Righi <arighi@develer.com>
  */
 
+#include <cfg/cfg_proc.h>
+
 .syntax unified
 
+#if !CONFIG_KERN_PREEMPT
 /* void asm_switch_context(void **new_sp [r0], void **save_sp [r1]) */
 .global asm_switch_context
 .thumb_func
 asm_switch_context:
-       mrs r12, msp
+       mrs ip, psp
         /* Save registers */
-       stmdb r12!, {r4-r11, lr}
+       stmdb ip!, {r4-r11, lr}
         /* Save old stack pointer */
-       str r12, [r1]
+       str ip, [r1]
         /* Load new stack pointer */
-       ldr r12, [r0]
+       ldr ip, [r0]
         /* Load new registers */
-       ldmia r12!, {r4-r11, lr}
-       msr msp, r12
+       ldmia ip!, {r4-r11, lr}
+       msr psp, ip
        bx lr
+#endif /* CONFIG_KERN_PREEMPT */