sam3n: fix confusion between interrupt numbers and peripheral ids.

[bertos.git] / bertos / cpu / cortex-m3 / io / sam3.h

diff --git a/bertos/cpu/cortex-m3/io/sam3.h b/bertos/cpu/cortex-m3/io/sam3.h
index 352fbfe5e28e14070dd7c1381b33d4b3eb7e45cf..c637d59e49a25fa15e8af00a20e0fe50ee824bdf 100644 (file)
--- a/bertos/cpu/cortex-m3/io/sam3.h
+++ b/bertos/cpu/cortex-m3/io/sam3.h
@@ -39,54 +39,86 @@
 #include <cpu/detect.h>
 #include <cfg/compiler.h>
 
+/*
+ * Peripherals IDs.
+ */
+/*\{*/
 #if CPU_CM3_AT91SAM3N
-       /*
-        * Redefine CPU detect macros for compatibility with stock
-        * Atmel IO include file.
-        */
-       #if CPU_CM3_AT91SAM3N4
-               #define sam3n4
-       #elif CPU_CM3_AT91SAM3N2
-               #define sam3n2
-       #elif CPU_CM3_AT91SAM3N1
-               #define sam3n1
-       #endif
-       #include "sam3n.h"
+       #define SUPC_ID      0   ///< Supply Controller (SUPC)
+       #define RSTC_ID      1   ///< Reset Controller (RSTC)
+       #define RTC_ID       2   ///< Real Time Clock (RTC)
+       #define RTT_ID       3   ///< Real Time Timer (RTT)
+       #define WDT_ID       4   ///< Watchdog Timer (WDT)
+       #define PMC_ID       5   ///< Power Management Controller (PMC)
+       #define EFC_ID       6   ///< Enhanced Flash Controller (EFC)
+       #define UART0_ID     8   ///< UART 0 (UART0)
+       #define UART1_ID     9   ///< UART 1 (UART1)
+       #define PIOA_ID     11   ///< Parallel I/O Controller A (PIOA)
+       #define PIOB_ID     12   ///< Parallel I/O Controller B (PIOB)
+       #define PIOC_ID     13   ///< Parallel I/O Controller C (PIOC)
+       #define US0_ID      14   ///< USART 0 (USART0)
+       #define US1_ID      15   ///< USART 1 (USART1)
+       #define TWI0_ID     19   ///< Two Wire Interface 0 (TWI0)
+       #define TWI1_ID     20   ///< Two Wire Interface 1 (TWI1)
+       #define SPI0_ID     21   ///< Serial Peripheral Interface (SPI)
+       #define TC0_ID      23   ///< Timer/Counter 0 (TC0)
+       #define TC1_ID      24   ///< Timer/Counter 1 (TC1)
+       #define TC2_ID      25   ///< Timer/Counter 2 (TC2)
+       #define TC3_ID      26   ///< Timer/Counter 3 (TC3)
+       #define TC4_ID      27   ///< Timer/Counter 4 (TC4)
+       #define TC5_ID      28   ///< Timer/Counter 5 (TC5)
+       #define ADC_ID      29   ///< Analog To Digital Converter (ADC)
+       #define DACC_ID     30   ///< Digital To Analog Converter (DACC)
+       #define PWM_ID      31   ///< Pulse Width Modulation (PWM)
 #else
-       #error Unimplemented CPU
+       #error Peripheral IDs undefined
 #endif
+/*\}*/
+
+/*
+ * Hardware features for drivers.
+ */
+#define USART_HAS_PDC  1
 
+
+#include "sam3_sysctl.h"
+#include "sam3_pmc.h"
+#include "sam3_ints.h"
+#include "sam3_pio.h"
 #include "sam3_nvic.h"
+#include "sam3_uart.h"
+#include "sam3_usart.h"
+#include "sam3_spi.h"
+#include "sam3_flash.h"
+#include "sam3_wdt.h"
 
 /**
- * Total number of interrupts.
+ * UART I/O pins
  */
 /*\{*/
-#define NUM_INTERRUPTS  32
+#if CPU_CM3_AT91SAM3U
+       #define RXD0   11
+       #define TXD0   12
+#else
+       #define RXD0    9
+       #define TXD0   10
+       #define RXD1    2
+       #define TXD1    3
+#endif
 /*\}*/
 
 /**
- * UART PIO pins
+ * PIO I/O pins
  */
 /*\{*/
-#ifdef CPU_CM3_AT91SAM3U
-       #define GPIO_UART0_RX_PIN   BV(11)
-       #define GPIO_UART0_TX_PIN   BV(12)
+#if CPU_CM3_AT91SAM3U
+       #define SPI0_SPCK   15
+       #define SPI0_MOSI   14
+       #define SPI0_MISO   13
 #else
-       #define GPIO_UART0_RX_PIN   BV(9)
-       #define GPIO_UART0_TX_PIN   BV(10)
-       #define GPIO_UART1_RX_PIN   BV(2)
-       #define GPIO_UART1_TX_PIN   BV(3)
+       #define SPI0_SPCK   14
+       #define SPI0_MOSI   13
+       #define SPI0_MISO   12
 #endif
 /*\}*/
-#if 0
-#include "sam3_sysctl.h"
-#include "sam3_pmc.h"
-#include "sam3_memmap.h"
-#include "sam3_ints.h"
-#include "sam3_gpio.h"
-#include "sam3_uart.h"
-#include "sam3_flash.h"
-#endif
-
 #endif /* SAM3_H */