#define DMAC_CTRLB_IEN 30 ///< (DMAC_CTRLB).
/* DMAC_CFG : (DMAC Offset: N/A) DMAC Channel Configuration Register*/
-#define DMAC_CFG_SRC_PER_MASK 0xf ///< (DMAC_CFG) Source with Peripheral identifier.
-#define DMAC_CFG_DST_PER_MASK 0xf0 ///< (DMAC_CFG) Destination with Peripheral identifier.
-#define DMAC_CFG_DST_PER_SHIFT 4 ///< (DMAC_CFG) Destination with Peripheral identifier.
+#define DMAC_CFG_SRC_PER_MASK 0xf ///< (DMAC_CFG) Source with Peripheral identifier.
+#define DMAC_CFG_DST_PER_MASK 0xf0 ///< (DMAC_CFG) Destination with Peripheral identifier.
+#define DMAC_CFG_DST_PER_SHIFT 4 ///< (DMAC_CFG) Destination with Peripheral identifier.
#define DMAC_CFG_SRC_H2SEL 9 ///< (DMAC_CFG) Software or Hardware Selection for the Source.
#define DMAC_CFG_DST_H2SEL 13 ///< (DMAC_CFG) Software or Hardware Selection for the Destination.
#define DMAC_CFG_SOD 16 ///< (DMAC_CFG) Stop On Done.
#define DMAC_CFG_LOCK_IF 20 ///< (DMAC_CFG) Interface Lock.
#define DMAC_CFG_LOCK_B 21 ///< (DMAC_CFG) Bus Lock.
#define DMAC_CFG_LOCK_IF_L 22 ///< (DMAC_CFG) Master Interface Arbiter Lock.
+#define DMAC_CFG_AHB_PROT_SHIFT 24 ///< (DMAC_CFG) AHB Protection.
#define DMAC_CFG_AHB_PROT_MASK 0x7000000 ///< (DMAC_CFG) AHB Protection.
#define DMAC_CFG_FIFOCFG_MASK 0x70000000 ///< (DMAC_CFG) FIFO Configuration.
#define DMAC_CFG_FIFOCFG_ALAP_CFG 0x00000000 ///< (DMAC_CFG) The largest defined length AHB burst is performed on the destination AHB interface..