*
* -->
*
- * \brief ATSAM3 enhanced embedded flash controller definitions.
+ * \brief Atmel SAM3 enhanced embedded flash controller definitions.
*/
#ifndef SAM3_FLASH_H
#define SAM3_FLASH_H
/**
- * EEFC registers.
+ * EEFC base registers addresses.
+ */
+/*\{*/
+#define EEFC0_BASE 0x400E0A00
+#ifdef CPU_CM3_SAM3X
+ #define EEFC1_BASE 0x400E0C00
+#endif
+/*\}*/
+
+
+/**
+ * EFC register offsets.
*/
/*\{*/
-#define EEFC_FMR_R (*((reg32_t *)0x400E0A00)) ///< Flash Mode Register
-#define EEFC_FCR_R (*((reg32_t *)0x400E0A04)) ///< Flash Command Register
-#define EEFC_FSR_R (*((reg32_t *)0x400E0A08)) ///< Flash Status Register
-#define EEFC_FRR_R (*((reg32_t *)0x400E0A0C)) ///< Flash Result Register
+#define EEFC_FMR_OFF 0x0 ///< Flash Mode Register
+#define EEFC_FCR_OFF 0x4 ///< Flash Command Register
+#define EEFC_FSR_OFF 0x8 ///< Flash Status Register
+#define EEFC_FRR_OFF 0xC ///< Flash Result Register
/*\}*/
/**
- * EFC register addresses.
+ * EEFC registers.
*/
/*\{*/
-#define EEFC_FMR 0x400E0A00 ///< Flash Mode Register
-#define EEFC_FCR 0x400E0A04 ///< Flash Command Register
-#define EEFC_FSR 0x400E0A08 ///< Flash Status Register
-#define EEFC_FRR 0x400E0A0C ///< Flash Result Register
+#define EEFC0_FMR (*((reg32_t *)(EEFC0_BASE + EEFC_FMR_OFF))) ///< Flash Mode Register
+#define EEFC0_FCR (*((reg32_t *)(EEFC0_BASE + EEFC_FCR_OFF))) ///< Flash Command Register
+#define EEFC0_FSR (*((reg32_t *)(EEFC0_BASE + EEFC_FSR_OFF))) ///< Flash Status Register
+#define EEFC0_FRR (*((reg32_t *)(EEFC0_BASE + EEFC_FRR_OFF))) ///< Flash Result Register
+
+#ifdef CPU_CM3_SAM3X
+ #define EEFC1_FMR (*((reg32_t *)(EEFC1_BASE + EEFC_FMR_OFF))) ///< Flash Mode Register
+ #define EEFC1_FCR (*((reg32_t *)(EEFC1_BASE + EEFC_FCR_OFF))) ///< Flash Command Register
+ #define EEFC1_FSR (*((reg32_t *)(EEFC1_BASE + EEFC_FSR_OFF))) ///< Flash Status Register
+ #define EEFC1_FRR (*((reg32_t *)(EEFC1_BASE + EEFC_FRR_OFF))) ///< Flash Result Register
+#endif
/*\}*/
+
/**
* Defines for bit fields in EEFC_FMR register.
*/
/*\{*/
-#define EEFC_FMR_FRDY BV(0) ///< Ready Interrupt Enable
-#define EEFC_FMR_FWS_S 8
-#define EEFC_FMR_FWS_M (0xf << EEFC_FMR_FWS_S) ///< Flash Wait State
-#define EEFC_FMR_FWS(value) (EEFC_FMR_FWS_M & ((value) << EEFC_FMR_FWS_S))
-#define EEFC_FMR_FAM BV(24) ///< Flash Access Mode
+#define EEFC_FMR_FRDY 0 ///< Ready Interrupt Enable
+#define EEFC_FMR_FWS_SHIFT 8
+#define EEFC_FMR_FWS_MASK (0xf << EEFC_FMR_FWS_SHIFT) ///< Flash Wait State
+#define EEFC_FMR_FWS(value) (EEFC_FMR_FWS_MASK & ((value) << EEFC_FMR_FWS_SHIFT))
+#define EEFC_FMR_FAM 24 ///< Flash Access Mode
/*\}*/
/**
* Defines for bit fields in EEFC_FCR register.
*/
/*\{*/
-#define EEFC_FCR_FCMD_M 0xff ///< Flash Command
-#define EEFC_FCR_FCMD(value) (EEFC_FCR_FCMD_M & (value))
-#define EEFC_FCR_FARG_S 8
-#define EEFC_FCR_FARG_M (0xffff << EEFC_FCR_FARG_S) ///< Flash Command Argument
-#define EEFC_FCR_FARG(value) (EEFC_FCR_FARG_M & ((value) << EEFC_FCR_FARG_S))
-#define EEFC_FCR_FKEY_S 24
-#define EEFC_FCR_FKEY_M (0xff << EEFC_FCR_FKEY_S) ///< Flash Writing Protection Key
-#define EEFC_FCR_FKEY(value) (EEFC_FCR_FKEY_M & ((value) << EEFC_FCR_FKEY_S))
+#define EEFC_FCR_FCMD_MASK 0xff ///< Flash Command
+#define EEFC_FCR_FCMD(value) (EEFC_FCR_FCMD_MASK & (value))
+#define EEFC_FCR_FARG_SHIFT 8
+#define EEFC_FCR_FARG_MASK (0xffff << EEFC_FCR_FARG_SHIFT) ///< Flash Command Argument
+#define EEFC_FCR_FARG(value) (EEFC_FCR_FARG_MASK & ((value) << EEFC_FCR_FARG_SHIFT))
+#define EEFC_FCR_FKEY_SHIFT 24
+#define EEFC_FCR_FKEY_MASK (0xff << EEFC_FCR_FKEY_SHIFT) ///< Flash Writing Protection Key
+#define EEFC_FCR_FKEY(value) (EEFC_FCR_FKEY_MASK & ((value) << EEFC_FCR_FKEY_SHIFT))
/*\}*/
/**
* Defines for bit fields in EEFC_FSR register.
*/
/*\{*/
-#define EEFC_FSR_FRDY BV(0) ///< Flash Ready Status
-#define EEFC_FSR_FCMDE BV(1) ///< Flash Command Error Status
-#define EEFC_FSR_FLOCKE BV(2) ///< Flash Lock Error Status
+#define EEFC_FSR_FRDY 0 ///< Flash Ready Status
+#define EEFC_FSR_FCMDE 1 ///< Flash Command Error Status
+#define EEFC_FSR_FLOCKE 2 ///< Flash Lock Error Status
/*\}*/
#endif /* SAM3_FLASH_H */