Add wizard support and linker scripts for STM32F103RE

[bertos.git] / bertos / cpu / cortex-m3 / io / sam3_pio.h

diff --git a/bertos/cpu/cortex-m3/io/sam3_pio.h b/bertos/cpu/cortex-m3/io/sam3_pio.h
index 0ad76f69af7d5d024d50ddf404e48b892b8f4e4a..686efa7244f4593fff0ee6630216d744a995fc8c 100644 (file)
--- a/bertos/cpu/cortex-m3/io/sam3_pio.h
+++ b/bertos/cpu/cortex-m3/io/sam3_pio.h
@@ -33,7 +33,7 @@
  *
  * \author Francesco Sacchi <batt@develer.com>
  *
- * ATSAM3 Parallel input/output controller.
+ * Atmel SAM3 Parallel input/output controller.
  * This file is based on NUT/OS implementation. See license below.
  */
 
@@ -79,6 +79,12 @@
 #define PIOA_BASE  0x400E0E00
 #define PIOB_BASE  0x400E1000
 #define PIOC_BASE  0x400E1200
+
+#if CPU_CM3_SAM3X
+       #define PIOD_BASE  0x400E1400
+       #define PIOE_BASE  0x400E1600
+       #define PIOF_BASE  0x400E1800
+#endif
 /*\}*/
 
 /** PIO Register Offsets */
@@ -178,7 +184,7 @@
        #define PIOA_PUER     PIOA_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
        #define PIOA_PUSR     PIOA_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
        #define PIOA_ABCDSR1  PIOA_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
-       #define PIOA_ABCDSR2  PIOA_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 2 address.
+       #define PIOA_ABCDSR2  PIOA_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
        #define PIOA_OWER     PIOA_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
        #define PIOA_OWDR     PIOA_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
        #define PIOA_OWSR     PIOA_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
@@ -214,7 +220,7 @@
        #define PIOB_PUER     PIOB_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
        #define PIOB_PUSR     PIOB_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
        #define PIOB_ABCDSR1  PIOB_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
-       #define PIOB_ABCDSR2  PIOB_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 2 address.
+       #define PIOB_ABCDSR2  PIOB_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
        #define PIOB_OWER     PIOB_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
        #define PIOB_OWDR     PIOB_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
        #define PIOB_OWSR     PIOB_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.
@@ -250,7 +256,7 @@
        #define PIOC_PUER     PIOC_ACCESS(PIO_PUER_OFF)      ///< Pull-up enable register address.
        #define PIOC_PUSR     PIOC_ACCESS(PIO_PUSR_OFF)      ///< Pull-up status register address.
        #define PIOC_ABCDSR1  PIOC_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 1 address.
-       #define PIOC_ABCDSR2  PIOC_ACCESS(PIO_ABCDSR1_OFF)   ///< PIO peripheral select register 2 address.
+       #define PIOC_ABCDSR2  PIOC_ACCESS(PIO_ABCDSR2_OFF)   ///< PIO peripheral select register 2 address.
        #define PIOC_OWER     PIOC_ACCESS(PIO_OWER_OFF)      ///< PIO output write enable register address.
        #define PIOC_OWDR     PIOC_ACCESS(PIO_OWDR_OFF)      ///< PIO output write disable register address.
        #define PIOC_OWSR     PIOC_ACCESS(PIO_OWSR_OFF)      ///< PIO output write status register address.