Add Device ID Base Address register to the STM32 memory map.

[bertos.git] / bertos / cpu / cortex-m3 / io / sam3_spi.h

diff --git a/bertos/cpu/cortex-m3/io/sam3_spi.h b/bertos/cpu/cortex-m3/io/sam3_spi.h
index 9785995934ff2aca554ae731f97d42c106b37b97..794b18123cd2604c8064350680de8fb914cee967 100644 (file)
--- a/bertos/cpu/cortex-m3/io/sam3_spi.h
+++ b/bertos/cpu/cortex-m3/io/sam3_spi.h
@@ -33,7 +33,7 @@
  *
  * \author Francesco Sacchi <batt@develer.com>
  *
- * ATSAM3 SPI register definitions.
+ * Atmel SAM3 SPI register definitions.
  * This file is based on NUT/OS implementation. See license below.
 
  */
@@ -78,6 +78,9 @@
  * SPI base addresses.
  */
 #define SPI0_BASE  0x40008000
+#if CPU_CM3_SAM3X
+       #define SPI1_BASE  0x4000C000
+#endif
 
 /**
  * SPI Control Register