Add some missign register defines. Reformat.
[bertos.git] / bertos / cpu / cortex-m3 / io / sam3_twi.h
index f9ea16bf151820d390c0d998fceb88ce5ea62fa4..48b0eb6d01475063a580b142417c55a7cad9f3da 100644 (file)
 #if CPU_CM3_SAM3X
        #define TWI0_BASE  0x4008C000
        #define TWI1_BASE  0x40090000
+#elif CPU_CM3_SAM3N || CPU_CM3_SAM3S
+       #define TWI0_BASE  0x40018000
+       #define TWI1_BASE  0x4001C000
+#elif CPU_CM3_SAM3U
+       #define TWI0_BASE  0x40084000
+       #define TWI1_BASE  0x40088000
 #else
        #error TWI registers not defined for selected CPU
 #endif