/* ADC registers Masks */\r
#define CR1_ADC_CLEAR_MASK ((uint32_t)0xFFF0FEFF)\r
#define CR2_ADC_CLEAR_MASK ((uint32_t)0xFFF1F7FD)\r
-#define SQR1_CLEAR_MASK ((uint32_t)0xFF0FFFFF)
+#define SQR1_CLEAR_MASK ((uint32_t)0xFF0FFFFF)
+
+
+
+/* ADC defines for SMT32F103Bxx */
+#define ADC_TEMP_V25 4300 // uV / C
+#define ADC_TEMP_SLOPE 1430 // mV
+#define ADC_TEMP_CONST 25000
+#define ADC_TEMP_CH 16
+#define ADC_VREFINT_CH 17
\r
struct stm32_adc
{