#ifndef STM32_FLASH_H
#define STM32_FLASH_H
+#include <cfg/compiler.h>
+
#include <cpu/types.h>
+/** Return the embedded flash size in kB */
+#define F_SIZE ((*(reg32_t *) 0x1FFFF7E0) & 0xFFFF)
+
+
/* Flash Access Control Register bits */
#define ACR_LATENCY_MASK ((uint32_t)0x00000038)
#define ACR_HLFCYA_MASK ((uint32_t)0xFFFFFFF7)
#define ACR_PRFTBE_MASK ((uint32_t)0xFFFFFFEF)
-#ifdef _FLASH_PROG
/* Flash Access Control Register bits */
#define ACR_PRFTBS_MASK ((uint32_t)0x00000020)
#define OB_IWDG_HW ((uint16_t)0x0000) /* Hardware IWDG selected */
/* Option Bytes nRST_STOP */
-#define OB_STOP_NoRST ((uint16_t)0x0002) /* No reset generated when entering in STOP */
+#define OB_STOP_NORST ((uint16_t)0x0002) /* No reset generated when entering in STOP */
#define OB_STOP_RST ((uint16_t)0x0000) /* Reset generated when entering in STOP */
/* Option Bytes nRST_STDBY */
-#define OB_STDBY_NoRST ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */
+#define OB_STDBY_NORST ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */
#define OB_STDBY_RST ((uint16_t)0x0000) /* Reset generated when entering in STANDBY */
/* FLASH Interrupts */
#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /* FLASH Write protected error flag */
#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /* FLASH Option Byte error flag */
+
+
+/**
+ * Embbeded flash configuration registers structure
+ */
+struct stm32_flash
+{
+ reg32_t ACR;
+ reg32_t KEYR;
+ reg32_t OPTKEYR;
+ reg32_t SR;
+ reg32_t CR;
+ reg32_t AR;
+ reg32_t RESERVED;
+ reg32_t OBR;
+ reg32_t WRPR;
+};
+
#endif /* STM32_FLASH_H */