sam3: add PDC register offsets

[bertos.git] / bertos / cpu / cortex-m3 / io / stm32_i2c.h

diff --git a/bertos/cpu/cortex-m3/io/stm32_i2c.h b/bertos/cpu/cortex-m3/io/stm32_i2c.h
index 56f265404e37e9e693e48b6939d272ff04c02a9d..a7e375fb7df70599186a3481ee7aac8a2719612b 100644 (file)
--- a/bertos/cpu/cortex-m3/io/stm32_i2c.h
+++ b/bertos/cpu/cortex-m3/io/stm32_i2c.h
@@ -239,12 +239,33 @@
 /* I2C CCR mask */
 #define CCR_CCR_SET             ((uint16_t)0x0FFF)
 
-/* I2C Status */
-#define SR1_BUSY                                 1
-#define SR1_MSL                                  0
 
-#define SR2_SB                                   0
+/* I2C CR1 */
+#define CR1_POS_SET                ((uint16_t)0x800)
+#define CR1_POS_RESET                 (~CR1_POS_SET)
 
+/* I2C Status */
+#define SR1_PECERR                              12
+#define SR1_OVR                                 11
+#define SR1_AF                                  10
+#define SR1_ARLO                                 9
+#define SR1_BERR                                 8
+#define SR1_TXE                                  7
+#define SR1_RXNE                                 6
+#define SR1_ADDR                                 1
+#define SR1_BTF                                  2
+#define SR1_SB                                   0
+
+#define SR2_TRA                                  2
+#define SR2_BUSY                                 1
+#define SR2_MSL                                  0
+
+
+#define SR1_ERR_MASK        (BV(SR1_PECERR) | \
+                                                        BV(SR1_OVR)    | \
+                                                        BV(SR1_AF)     | \
+                                                        BV(SR1_ARLO)   | \
+                                                        BV(SR1_BERR))
 
 struct stm32_i2c
 {