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CM3: add support to the IAR Embedded Workbench(TM) compiler
[bertos.git] / bertos / cpu / detect.h
diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h
index 81a62bb79b4824021f910827c61f4e35e94a26f0..d7ec6aad047720508b23ca0d0f6e97fa99d55e36 100644 (file)
--- a/bertos/cpu/detect.h
+++ b/bertos/cpu/detect.h
@@ -37,12 +37,12 @@
 #define CPU_DETECT_H
 
 #if defined(__ARM_ARCH_4T__) /* GCC */ \
-       || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
+       || (defined(__ICCARM__) && (__CORE__== __ARM4TM__)) /* IAR: defined for all cores == 4tm */
        #define CPU_ARM 1
        #define CPU_ID  arm
-       #define CPU_CORE_NAME            "ARM7TDMI"
+       #define CPU_CORE_NAME            "ARM7TDMI"
 
-       // AT91SAM7S core family
+    // AT91SAM7S products serie
        #if defined(__ARM_AT91SAM7S32__)
                #define CPU_ARM_AT91         1
                #define CPU_ARM_AT91SAM7S32  1
@@ -87,7 +87,7 @@
                #define CPU_ARM_AT91SAM7S512 0
        #endif
 
-       // AT91SAM7X core family
+       // AT91SAM7X products serie
        #if defined(__ARM_AT91SAM7X128__)
                #define CPU_ARM_AT91         1
                #define CPU_ARM_SAM7X        1
@@ -183,7 +183,8 @@
        #define CPU_ARM_LPC2378         0
 #endif
 
-#if defined(__ARM_ARCH_7M__)
+#if defined(__ARM_ARCH_7M__) /* GCC */ \
+    || (defined(__ICCARM__) && (__CORE__== __ARM7M__)) /* IAR: defined for all cores v7M */
        /* Cortex-M3 */
        #define CPU_CM3 1
        #define CPU_ID  cm3
@@ -205,6 +206,14 @@
                #define CPU_CM3_LM3S8962    0
        #endif
 
+       #if defined (__ARM_STM32F101C4__)
+               #define CPU_CM3_STM32       1
+               #define CPU_CM3_STM32F101C4 1
+               #define CPU_NAME            "STM32F101C4"
+       #else
+               #define CPU_CM3_STM32F101C4 0
+       #endif
+
        #if defined (__ARM_STM32F103RB__)
                #define CPU_CM3_STM32       1
                #define CPU_CM3_STM32F103RB 1
@@ -213,13 +222,70 @@
                #define CPU_CM3_STM32F103RB 0
        #endif
 
-       #if defined (__ARM_AT91SAM3N4__)
-               #define CPU_CM3_AT91SAM3    1
-               #define CPU_CM3_AT91SAM3N   1
-               #define CPU_CM3_AT91SAM3N4  1
-               #define CPU_NAME            "AT91SAM3N4"
+       #if defined (__ARM_STM32F103RE__)
+               #define CPU_CM3_STM32       1
+               #define CPU_CM3_STM32F103RE 1
+               #define CPU_NAME            "STM32F103RE"
+       #else
+               #define CPU_CM3_STM32F103RE 0
+       #endif
+
+       // AT91SAM3N products serie
+       #if defined (__ARM_SAM3N4__)
+               #define CPU_CM3_SAM3    1
+               #define CPU_CM3_SAM3N   1
+               #define CPU_CM3_SAM3N4  1
+               #define CPU_NAME        "SAM3N4"
+
+               #define CPU_CM3_SAM3S   0
+               #define CPU_CM3_SAM3U   0
+               #define CPU_CM3_SAM3N2  0
+               #define CPU_CM3_SAM3N1  0
+               #define CPU_CM3_SAM3X   0
+       #else
+               #define CPU_CM3_SAM3N4  0
+       #endif
+
+       // AT91SAM3S products serie
+       #if defined (__ARM_SAM3S4__)
+               #define CPU_CM3_SAM3    1
+               #define CPU_CM3_SAM3S   1
+               #define CPU_CM3_SAM3S4  1
+               #define CPU_NAME        "SAM3S4"
+
+               #define CPU_CM3_SAM3N   0
+               #define CPU_CM3_SAM3U   0
+               #define CPU_CM3_SAM3X   0
+       #else
+               #define CPU_CM3_SAM3S4  0
+       #endif
+
+       // AT91SAM3U products serie
+       #if defined (__ARM_SAM3U4__)
+               #define CPU_CM3_SAM3    1
+               #define CPU_CM3_SAM3U   1
+               #define CPU_CM3_SAM3U4  1
+               #define CPU_NAME        "SAM3U4"
+
+               #define CPU_CM3_SAM3N   0
+               #define CPU_CM3_SAM3S   0
+               #define CPU_CM3_SAM3X   0
+       #else
+               #define CPU_CM3_SAM3U4  0
+       #endif
+
+       // AT91SAM3X products serie
+       #if defined (__ARM_SAM3X8__)
+               #define CPU_CM3_SAM3    1
+               #define CPU_CM3_SAM3X   1
+               #define CPU_CM3_SAM3X8  1
+               #define CPU_NAME        "SAM3X8"
+
+               #define CPU_CM3_SAM3N   0
+               #define CPU_CM3_SAM3S   0
+               #define CPU_CM3_SAM3U   0
        #else
-               #define CPU_CM3_AT91SAM3N4  0
+               #define CPU_CM3_SAM3X8  0
        #endif
 
        #if defined (CPU_CM3_LM3S)
@@ -227,19 +293,19 @@
                        #error Luminary Cortex-M3 CPU configuration error
                #endif
                #define CPU_CM3_STM32       0
-               #define CPU_CM3_AT91SAM3    0
+               #define CPU_CM3_SAM3        0
        #elif defined (CPU_CM3_STM32)
-               #if CPU_CM3_STM32F103RB + 0 != 1
+               #if CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1
                        #error STM32 Cortex-M3 CPU configuration error
                #endif
                #define CPU_CM3_LM3S        0
-               #define CPU_CM3_AT91SAM3    0
-       #elif defined (CPU_CM3_AT91SAM3)
-               #if CPU_CM3_AT91SAM3N + 0 != 1
-                       #error AT91SAM3 Cortex-M3 CPU configuration error
+               #define CPU_CM3_SAM3        0
+       #elif defined (CPU_CM3_SAM3)
+               #if CPU_CM3_SAM3N + CPU_CM3_SAM3U + CPU_CM3_SAM3S + CPU_CM3_SAM3X + 0 != 1
+                       #error SAM3 Cortex-M3 CPU configuration error
                #endif
-               #if CPU_CM3_AT91SAM3N4 + 0 != 1
-                       #error AT91SAM3 Cortex-M3 CPU configuration error
+               #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + CPU_CM3_SAM3X8 + 0 != 1
+                       #error SAM3 Cortex-M3 CPU configuration error
                #endif
                #define CPU_CM3_LM3S        0
                #define CPU_CM3_STM32       0
@@ -247,11 +313,11 @@
        #else
                #define CPU_CM3_LM3S        0
                #define CPU_CM3_STM32       0
-               #define CPU_CM3_AT91SAM3    0
+               #define CPU_CM3_SAM3        0
        #endif
 
 
-       #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_AT91SAM3 + 0 /* Add other Cortex-M3 families here */ != 1
+       #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_SAM3 + 0 /* Add other Cortex-M3 families here */ != 1
                #error Cortex-M3 CPU configuration error
        #endif
 
@@ -263,14 +329,18 @@
 
        #define CPU_CM3_STM32 0
        #define CPU_CM3_STM32F103RB 0
-
-       #define CPU_CM3_AT91SAM3 0
-       #define CPU_CM3_AT91SAM3N 0
-       #define CPU_CM3_AT91SAM3N4 0
+       #define CPU_CM3_STM32F101C4 0
+    #define CPU_CM3_STM32F103RE 0
+
+       #define CPU_CM3_SAM3 0
+       #define CPU_CM3_SAM3N 0
+       #define CPU_CM3_SAM3N4 0
+       #define CPU_CM3_SAM3X 0
+       #define CPU_CM3_SAM3X8 0
 #endif
 
 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
-       && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
+       && !defined(__ICCARM__) /* IAR: if not ARM assume I196 */
        #warning Assuming CPU is I196
        #define CPU_I196                1
        #define CPU_ID                  i196
@@ -394,9 +464,16 @@
                #define CPU_AVR_ATMEGA1280  0
        #endif
 
+       #if defined(__AVR_ATmega2560__)
+               #define CPU_AVR_ATMEGA2560  1
+               #define CPU_NAME            "ATmega2560"
+       #else
+               #define CPU_AVR_ATMEGA2560  0
+       #endif
+
        #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
          + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
-         + CPU_AVR_ATMEGA1280 != 1
+         + CPU_AVR_ATMEGA1280 + CPU_AVR_ATMEGA2560 != 1
                #error AVR CPU configuration error
        #endif
 #else
@@ -410,21 +487,35 @@
        #define CPU_AVR_ATMEGA128       0
        #define CPU_AVR_ATMEGA1281      0
        #define CPU_AVR_ATMEGA1280      0
+       #define CPU_AVR_ATMEGA2560      0
 #endif
 
 #if defined (__MSP430__)
        #define CPU_MSP430              1
        #define CPU_ID                  msp430
-       #define CPU_CORE_NAME           "MSP430F2274"
+       #define CPU_CORE_NAME           "MSP430"
 
-       #if defined(__MSP430_2274__)
-               #define CPU_MSP430_2274     1
-               #define CPU_NAME            "2274"
+       #if defined(__MSP430F2274__)
+               #define CPU_MSP430F2274     1
+               #define CPU_NAME            "MSP430F2274"
        #else
-               #define CPU_MSP430_2274     0
+               #define CPU_MSP430F2274     0
+       #endif
+
+       #if defined(__MSP430G2231__)
+               #define CPU_MSP430G2231     1
+               #define CPU_NAME            "MSP430G2231"
+       #else
+               #define CPU_MSP430G2231     0
+       #endif
+
+       #if CPU_MSP430F2274 + CPU_MSP430G2231 != 1
+               #error MSP430 CPU configuration error
        #endif
 #else
-       #define CPU_MSP430              0
+       #define CPU_MSP430                  0
+       #define CPU_MSP430F2274             0
+       #define CPU_MSP430G2231             0
 #endif
 
 
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