#elif CPU_CM3
- #define CPU_SAVED_REGS_CNT fixme
+ #define CPU_SAVED_REGS_CNT 8
#define CPU_STACK_GROWS_UPWARD 0
#define CPU_SP_ON_EMPTY_SLOT 0
#define CPU_STACK_GROWS_UPWARD 0
#define CPU_SP_ON_EMPTY_SLOT 1
+#elif CPU_MSP430
+
+ #define CPU_SAVED_REGS_CNT 16
+ #define CPU_STACK_GROWS_UPWARD 1
+ #define CPU_SP_ON_EMPTY_SLOT 0
+
#else
#error No CPU_... defined.
#endif
CPU_PUSH_WORD((sp), 0x100); \
} while (0);
+#elif CPU_CM3
+
+ #if CONFIG_KERN_PREEMPT
+ INLINE void cm3_preempt_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp)
+ {
+ register cpu_stack_t **__new_sp asm ("r0") = new_sp;
+ register cpu_stack_t **__old_sp asm ("r1") = old_sp;
+
+ asm volatile ("svc #0"
+ : : "r"(__new_sp), "r"(__old_sp) : "memory", "cc");
+ }
+ #define asm_switch_context cm3_preempt_switch_context
+
+ #define CPU_CREATE_NEW_STACK(stack) \
+ do { \
+ size_t i; \
+ /* Initialize process stack frame */ \
+ CPU_PUSH_WORD((stack), 0x01000000); /* xPSR */ \
+ CPU_PUSH_WORD((stack), (cpu_stack_t)proc_entry); /* pc */ \
+ CPU_PUSH_WORD((stack), 0); /* lr */ \
+ CPU_PUSH_WORD((stack), 0); /* ip */ \
+ CPU_PUSH_WORD((stack), 0); /* r3 */ \
+ CPU_PUSH_WORD((stack), 0); /* r2 */ \
+ CPU_PUSH_WORD((stack), 0); /* r1 */ \
+ CPU_PUSH_WORD((stack), 0); /* r0 */ \
+ CPU_PUSH_WORD((stack), 0xfffffffd); /* lr_exc */ \
+ /* Push a clean set of CPU registers for asm_switch_context() */ \
+ for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
+ CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
+ CPU_PUSH_WORD(stack, IRQ_PRIO_DISABLED); \
+ } while (0)
+
+ #endif /* CONFIG_KERN_PREEMPT */
+
#elif CPU_AVR
/*
* On AVR, addresses are pushed into the stack as little-endian, while
CPU_PUSH_WORD((sp), 0); /* CR -> 4(SP) */ \
} while (0)
-#else
+#endif
+
+#ifndef CPU_PUSH_CALL_FRAME
#define CPU_PUSH_CALL_FRAME(sp, func) \
CPU_PUSH_WORD((sp), (cpu_stack_t)(func))
#endif