Merge branch "preempt" in "trunk".

[bertos.git] / bertos / cpu / frame.h

diff --git a/bertos/cpu/frame.h b/bertos/cpu/frame.h
index 1a80fa1da21fa2faf415391212835573a99608ea..dbb20a1ec67aa6692d504f2fb83b3d9e57024887 100644 (file)
--- a/bertos/cpu/frame.h
+++ b/bertos/cpu/frame.h
@@ -51,38 +51,27 @@
 #include <cfg/compiler.h>      /* for uintXX_t */
 
 #if CPU_X86
+       #if CPU_X86_32
 
-       #define CPU_SAVED_REGS_CNT      7
-       #define CPU_STACK_GROWS_UPWARD  0
-       #define CPU_SP_ON_EMPTY_SLOT    0
+               #define CPU_SAVED_REGS_CNT      4
+               #define CPU_STACK_GROWS_UPWARD  0
+               #define CPU_SP_ON_EMPTY_SLOT    0
+
+       #elif CPU_X86_64
+
+               #define CPU_SAVED_REGS_CNT      8
+               #define CPU_STACK_GROWS_UPWARD  0
+               #define CPU_SP_ON_EMPTY_SLOT    0
+       #else
+               #error "unknown CPU"
+       #endif
 
 #elif CPU_ARM
 
-       #define CPU_SAVED_REGS_CNT     10
+       #define CPU_SAVED_REGS_CNT     8
        #define CPU_STACK_GROWS_UPWARD 0
        #define CPU_SP_ON_EMPTY_SLOT   0
 
-       /**
-        * Initialization value for registers in stack frame.
-        * The register index is not directly corrispondent to CPU
-        * register numbers, but is related to how are pushed to
-        * stack (\see asm_switch_context).
-        * Index (CPU_SAVED_REGS_CNT - 1) is the CPSR register,
-        * the initial value is set to:
-        * - All flags (N, Z, C, V) set to 0.
-        * - IRQ and FIQ enabled.
-        * - ARM state.
-        * - CPU in Supervisor Mode (SVC).
-        */
-       #define CPU_REG_INIT_VALUE(reg) \
-       ({  int a = 0; \
-               if(reg == 0) \
-                       a = (int)proc_exit; \
-               else if(reg == (CPU_SAVED_REGS_CNT - 1)) \
-                       a = 0x13; \
-               a; \
-       })
-
 #elif CPU_PPC
 
        #define CPU_SAVED_REGS_CNT     1
@@ -97,18 +86,10 @@
 
 #elif CPU_AVR
 
-       #define CPU_SAVED_REGS_CNT     19
+       #define CPU_SAVED_REGS_CNT     18
        #define CPU_STACK_GROWS_UPWARD  0
        #define CPU_SP_ON_EMPTY_SLOT    1
 
-       /**
-        * Initialization value for registers in stack frame.
-        * The register index is not directly corrispondent to CPU
-        * register numbers. Index 0 is the SREG register: the initial
-        * value is all 0 but the interrupt bit (bit 7).
-        */
-       #define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
-
 #else
        #error No CPU_... defined.
 #endif
@@ -123,7 +104,7 @@
 
 /// Default for macro not defined in the right arch section
 #ifndef CPU_REG_INIT_VALUE
-       #define CPU_REG_INIT_VALUE(reg)     0
+       #define CPU_REG_INIT_VALUE(reg)     (reg)
 #endif
 
 /*
@@ -244,4 +225,20 @@
        #endif /* !ARCH_EMUL */
 #endif /* !CPU_IDLE */
 
+/**
+ * Default macro for creating a new Process stack
+ */
+#ifndef CPU_CREATE_NEW_STACK
+
+       #define CPU_CREATE_NEW_STACK(stack) \
+               do { \
+                       size_t i; \
+                       /* Initialize process stack frame */ \
+                       CPU_PUSH_CALL_FRAME(stack, proc_entry); \
+                       /* Push a clean set of CPU registers for asm_switch_context() */ \
+                       for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
+                               CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
+               } while (0)
+#endif
+
 #endif /* CPU_ATTR_H */