rename cpuXXX_t to cpu_XXX_t
[bertos.git] / bertos / cpu / irq.h
index 290b73d722d920380593d94dd4233da287abe39f..011524b8f098bd874ab38d967aea34f6bde31426 100644 (file)
@@ -60,6 +60,7 @@
                #define IRQ_RESTORE(x)          FIXME
        #endif /* OS_EMBEDDED */
 
+
 #elif CPU_ARM
 
        #ifdef __IAR_SYSTEMS_ICC__
@@ -68,8 +69,8 @@
 
                #if __CPU_MODE__ == 1 /* Thumb */
                        /* Use stubs */
-                       extern cpuflags_t get_CPSR(void);
-                       extern void set_CPSR(cpuflags_t flags);
+                       extern cpu_flags_t get_CPSR(void);
+                       extern void set_CPSR(cpu_flags_t flags);
                #else
                        #define get_CPSR __get_CPSR
                        #define set_CPSR __set_CPSR
@@ -92,8 +93,6 @@
                #define IRQ_ENABLED() \
                        ((bool)(get_CPSR() & 0xb0))
 
-               #define BREAKPOINT  /* asm("bkpt 0") DOES NOT WORK */
-
        #else /* !__IAR_SYSTEMS_ICC__ */
 
                #define IRQ_DISABLE \
 
                #define CPU_READ_FLAGS() \
                ({ \
-                       cpuflags_t sreg; \
+                       cpu_flags_t sreg; \
                        asm volatile ( \
                                "mrs %0, cpsr\n\t" \
                                : "=r" (sreg) \
 
 #elif CPU_DSP56K
 
-       #define BREAKPOINT              asm(debug)
        #define IRQ_DISABLE             do { asm(bfset #0x0200,SR); asm(nop); } while (0)
        #define IRQ_ENABLE              do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
 
        #define IRQ_EXIT() /* NOP */
 #endif
 
+#ifdef IRQ_RUNNING
+       /// Ensure callee is running within an interrupt
+       #define ASSERT_IRQ_CONTEXT()  ASSERT(IRQ_RUNNING())
+
+       /// Ensure callee is not running within an interrupt
+       #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
+#else
+       #define ASSERT_USER_CONTEXT()  do {} while(0)
+       #define ASSERT_IRQ_CONTEXT()   do {} while(0)
+#endif
+
+#ifdef IRQ_ENABLED
+       /// Ensure interrupts are enabled
+       #define IRQ_ASSERT_ENABLED()  ASSERT(IRQ_ENABLED())
+
+       /// Ensure interrupts are not enabled
+       #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED())
+#else
+       #define IRQ_ASSERT_ENABLED() do {} while(0)
+       #define IRQ_ASSERT_DISABLED() do {} while(0)
+#endif
 
 /**
  * Execute \a CODE atomically with respect to interrupts.
  */
 #define ATOMIC(CODE) \
        do { \
-               cpuflags_t __flags; \
+               cpu_flags_t __flags; \
                IRQ_SAVE_DISABLE(__flags); \
                CODE; \
                IRQ_RESTORE(__flags); \
        } while (0)
 
-
-#ifndef BREAKPOINT
-#define BREAKPOINT /* nop */
-#endif
-
-
 #endif /* CPU_IRQ_H */