#define IRQ_RESTORE(x) FIXME
#endif /* OS_EMBEDDED */
- #ifdef __GNUC__
- #define BREAKPOINT asm volatile ("int 3" ::)
- #endif
#elif CPU_ARM
#if __CPU_MODE__ == 1 /* Thumb */
/* Use stubs */
- extern cpuflags_t get_CPSR(void);
- extern void set_CPSR(cpuflags_t flags);
+ extern cpu_flags_t get_CPSR(void);
+ extern void set_CPSR(cpu_flags_t flags);
#else
#define get_CPSR __get_CPSR
#define set_CPSR __set_CPSR
#define IRQ_ENABLED() \
((bool)(get_CPSR() & 0xb0))
- #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */
-
#else /* !__IAR_SYSTEMS_ICC__ */
#define IRQ_DISABLE \
#define CPU_READ_FLAGS() \
({ \
- cpuflags_t sreg; \
+ cpu_flags_t sreg; \
asm volatile ( \
"mrs %0, cpsr\n\t" \
: "=r" (sreg) \
#define IRQ_ENABLED() FIXME
#endif /* OS_EMBEDDED */
- #ifdef __GNUC__
- #define BREAKPOINT asm volatile ("twge 2,2" ::)
- #endif
-
#elif CPU_DSP56K
- #define BREAKPOINT asm(debug)
#define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0)
#define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
#define IRQ_ASSERT_DISABLED() do {} while(0)
#endif
-// OBSOLETE names
-#define ASSERT_IRQ_ENABLED() IRQ_ASSERT_ENABLED()
-#define ASSERT_IRQ_DISABLED() IRQ_ASSERT_DISABLED()
-
/**
* Execute \a CODE atomically with respect to interrupts.
*
*/
#define ATOMIC(CODE) \
do { \
- cpuflags_t __flags; \
+ cpu_flags_t __flags; \
IRQ_SAVE_DISABLE(__flags); \
CODE; \
IRQ_RESTORE(__flags); \
} while (0)
-
-#ifndef BREAKPOINT
-#define BREAKPOINT /* nop */
-#endif
-
-
#endif /* CPU_IRQ_H */