msp430: kdebug driver enhancement

[bertos.git] / bertos / cpu / msp430 / drv / kdebug_msp430.c

diff --git a/bertos/cpu/msp430/drv/kdebug_msp430.c b/bertos/cpu/msp430/drv/kdebug_msp430.c
index b263efca7f400e189bc6b1d7aab8e3ac1be8b8a1..7e5a11bd97f7db884263a16b3e3ecde5b9c1ae66 100644 (file)
--- a/bertos/cpu/msp430/drv/kdebug_msp430.c
+++ b/bertos/cpu/msp430/drv/kdebug_msp430.c
@@ -36,11 +36,13 @@
  * \author Mohamed Tarek <mtarek16@gmail.com>
  */
 
-#include <hw/hw_cpufreq.h>     /* for CPU_FREQ */
-#include "hw/hw_ser.h"         /* bus macros overrides */
+#include <hw/hw_cpufreq.h>  /* for CPU_FREQ */
+#include "hw/hw_ser.h"      /* bus macros overrides */
 
 #include "cfg/cfg_debug.h"
-#include <cfg/macros.h>                /* for DIV_ROUND */
+#include <cfg/macros.h>     /* for DIV_ROUND */
+
+#include "kdebug_msp430.h"  /* for UART clock source definitions */
 
 #include <cpu/types.h>
 #include <cpu/attr.h>
@@ -102,20 +104,32 @@
        IE = (old); \
 } while(0)
 
+#if CONFIG_KDEBUG_CLOCK_FREQ
+       #define KDBG_MSP430_FREQ CONFIG_KDEBUG_CLOCK_FREQ
+#else
+       #define KDBG_MSP430_FREQ CPU_FREQ
+#endif
+
 typedef uint8_t kdbg_irqsave_t;
 
 INLINE void kdbg_hw_init(void)
 {
-       /* Assume SMCLK = MCLK = DCO = CPU_FREQ */
-       /* Compute the baud rate */
-       uint16_t quot = DIV_ROUND(CPU_FREQ, CONFIG_KDEBUG_BAUDRATE);
-       KDBG_MSP430_UART_PINS_INIT();           // Configure USCI TX/RX pins
-       UCCTL1 |= UCSSEL_2;                                     // use SMCLK
-       UCBR0   = quot & 0xFF;
+       /* Compute the clock prescaler for the desired baudrate */
+       uint16_t quot = DIV_ROUND(KDBG_MSP430_FREQ, CONFIG_KDEBUG_BAUDRATE);
+       KDBG_MSP430_UART_PINS_INIT();       // Configure USCI TX/RX pins
+
+#if (CONFIG_KDEBUG_CLOCK_SOURCE == KDBG_UART_SMCLK)
+       UCCTL1 |= UCSSEL_SMCLK;
+#else
+       UCCTL1 |= UCSSEL_ACLK;
+#endif
+
+       UCBR0   = quot & 0xFF;              // Setup clock prescaler for the UART
        UCBR1   = quot >> 8;
-       UCMCTL  = UCBRS0;                                       // No Modulation
-       UCCTL0  = 0;                                            // Default UART settings (8N1)
-       UCCTL1 &= ~UCSWRST;                                     // Initialize USCI state machine
-       KDBG_MASK_IRQ(IE2);                                     // Disable USCI interrupts
+
+       UCMCTL  = UCBRS0;                   // No Modulation
+       UCCTL0  = 0;                        // Default UART settings (8N1)
+       UCCTL1 &= ~UCSWRST;                 // Initialize USCI state machine
+       KDBG_MASK_IRQ(IE2);                 // Disable USCI interrupts
 }