* Copyright 2011 Develer S.r.l. (http://www.develer.com/)
* -->
*
-* \brief Micron MT29F serial NAND driver
+* \brief ONFI 1.0 compliant NAND kblock driver
*
* \author Stefano Fedrigo <aleph@develer.com>
*
-* $WIZ$ module_name = "mt29f"
+* $WIZ$ module_name = "nand"
* $WIZ$ module_depends = "timer", "kblock", "heap"
-* $WIZ$ module_configuration = "bertos/cfg/cfg_mt29f.h"
+* $WIZ$ module_configuration = "bertos/cfg/cfg_nand.h"
+*
*/
-#ifndef DRV_MT29F_H
-#define DRV_MT29F_H
+#ifndef DRV_NAND_H
+#define DRV_NAND_H
-#include "cfg/cfg_mt29f.h"
-#include <cfg/macros.h>
+#include "cfg/cfg_nand.h"
#include <io/kblock.h>
// Define log settings for cfg/log.h
-#define LOG_LEVEL CONFIG_MT29F_LOG_LEVEL
-#define LOG_FORMAT CONFIG_MT29F_LOG_FORMAT
+#define LOG_LEVEL CONFIG_NAND_LOG_LEVEL
+#define LOG_FORMAT CONFIG_NAND_LOG_FORMAT
/**
* \name Error codes.
* \{
*/
-#define MT29F_ERR_ERASE BV(1) ///< Error erasing a block
-#define MT29F_ERR_WRITE BV(2) ///< Error writing a page
-#define MT29F_ERR_RD_TMOUT BV(3) ///< Read timeout
-#define MT29F_ERR_WR_TMOUT BV(4) ///< Write timeout
-#define MT29F_ERR_ECC BV(5) ///< Unrecoverable ECC error
+#define NAND_ERR_ERASE BV(1) ///< Error erasing a block
+#define NAND_ERR_WRITE BV(2) ///< Error writing a page
+#define NAND_ERR_RD_TMOUT BV(3) ///< Read timeout
+#define NAND_ERR_WR_TMOUT BV(4) ///< Write timeout
+#define NAND_ERR_ECC BV(5) ///< Unrecoverable ECC error
/** \} */
-#define MT29F_PAGE_SIZE (CONFIG_MT29F_DATA_SIZE + CONFIG_MT29F_SPARE_SIZE)
-#define MT29F_BLOCK_SIZE (CONFIG_MT29F_DATA_SIZE * CONFIG_MT29F_PAGES_PER_BLOCK)
-
-// Number of usable blocks, and index of first remapping block
-#define MT29F_NUM_USER_BLOCKS (CONFIG_MT29F_NUM_BLOCK - CONFIG_MT29F_NUM_REMAP_BLOCKS)
-
// NAND commands
-#define MT29F_CMD_READ_1 0x00
-#define MT29F_CMD_READ_2 0x30
-#define MT29F_CMD_COPYBACK_READ_1 0x00
-#define MT29F_CMD_COPYBACK_READ_2 0x35
-#define MT29F_CMD_COPYBACK_PROGRAM_1 0x85
-#define MT29F_CMD_COPYBACK_PROGRAM_2 0x10
-#define MT29F_CMD_RANDOM_OUT 0x05
-#define MT29F_CMD_RANDOM_OUT_2 0xE0
-#define MT29F_CMD_RANDOM_IN 0x85
-#define MT29F_CMD_READID 0x90
-#define MT29F_CMD_WRITE_1 0x80
-#define MT29F_CMD_WRITE_2 0x10
-#define MT29F_CMD_ERASE_1 0x60
-#define MT29F_CMD_ERASE_2 0xD0
-#define MT29F_CMD_STATUS 0x70
-#define MT29F_CMD_RESET 0xFF
-
-
-// Get block from page
-#define PAGE(blk) ((blk) * CONFIG_MT29F_PAGES_PER_BLOCK)
-
-// Page from block and page in block
-#define BLOCK(page) ((uint16_t)((page) / CONFIG_MT29F_PAGES_PER_BLOCK))
-#define PAGE_IN_BLOCK(page) ((uint16_t)((page) % CONFIG_MT29F_PAGES_PER_BLOCK))
+#define NAND_CMD_READ_1 0x00
+#define NAND_CMD_READ_2 0x30
+#define NAND_CMD_COPYBACK_READ_1 0x00
+#define NAND_CMD_COPYBACK_READ_2 0x35
+#define NAND_CMD_COPYBACK_PROGRAM_1 0x85
+#define NAND_CMD_COPYBACK_PROGRAM_2 0x10
+#define NAND_CMD_RANDOM_OUT 0x05
+#define NAND_CMD_RANDOM_OUT_2 0xE0
+#define NAND_CMD_RANDOM_IN 0x85
+#define NAND_CMD_READID 0x90
+#define NAND_CMD_WRITE_1 0x80
+#define NAND_CMD_WRITE_2 0x10
+#define NAND_CMD_ERASE_1 0x60
+#define NAND_CMD_ERASE_2 0xD0
+#define NAND_CMD_STATUS 0x70
+#define NAND_CMD_RESET 0xFF
/**
- * MT29F context.
+ * NAND context.
*/
-typedef struct Mt29f
+typedef struct Nand
{
KBlock fd; // KBlock descriptor
uint16_t *block_map; // For bad blocks remapping
uint16_t remap_start; // First unused remap block
-} Mt29f;
+} Nand;
/*
* Kblock id.
/**
* Convert + ASSERT from generic KBlock to NAND context.
*/
-INLINE Mt29f *MT29F_CAST(KBlock *kb)
+INLINE Nand *NAND_CAST(KBlock *kb)
{
ASSERT(kb->priv.type == KBT_NAND);
- return (Mt29f *)kb;
+ return (Nand *)kb;
}
struct Heap;
// Kblock interface
-bool mt29f_init(Mt29f *chip, struct Heap *heap, unsigned chip_select);
-bool mt29f_initUnbuffered(Mt29f *chip, struct Heap *heap, unsigned chip_select);
+bool nand_init(Nand *chip, struct Heap *heap, unsigned chip_select);
+bool nand_initUnbuffered(Nand *chip, struct Heap *heap, unsigned chip_select);
// NAND specific functions
-bool mt29f_getDevId(Mt29f *chip, uint8_t dev_id[5]);
-int mt29f_blockErase(Mt29f *chip, uint16_t block);
-void mt29f_format(Mt29f *chip);
+bool nand_getDevId(Nand *chip, uint8_t dev_id[5]);
+int nand_blockErase(Nand *chip, uint16_t block);
+void nand_format(Nand *chip);
#ifdef _DEBUG
-void mt29f_ruinSomeBlocks(Mt29f *chip);
+void nand_ruinSomeBlocks(Nand *chip);
#endif
// Hardware specific functions, implemented by cpu specific module
-bool mt29f_waitReadyBusy(Mt29f *chip, time_t timeout);
-bool mt29f_waitTransferComplete(Mt29f *chip, time_t timeout);
-void mt29f_sendCommand(Mt29f *chip, uint32_t cmd1, uint32_t cmd2,
+bool nand_waitReadyBusy(Nand *chip, time_t timeout);
+bool nand_waitTransferComplete(Nand *chip, time_t timeout);
+void nand_sendCommand(Nand *chip, uint32_t cmd1, uint32_t cmd2,
int num_cycles, uint32_t cycle0, uint32_t cycle1234);
-uint8_t mt29f_getChipStatus(Mt29f *chip);
-void *mt29f_dataBuffer(Mt29f *chip);
-bool mt29f_checkEcc(Mt29f *chip);
-void mt29f_computeEcc(Mt29f *chip, const void *buf, size_t size, uint32_t *ecc, size_t ecc_size);
-void mt29f_hwInit(Mt29f *chip);
+uint8_t nand_getChipStatus(Nand *chip);
+void *nand_dataBuffer(Nand *chip);
+bool nand_checkEcc(Nand *chip);
+void nand_computeEcc(Nand *chip, const void *buf, size_t size, uint32_t *ecc, size_t ecc_size);
+void nand_hwInit(Nand *chip);
-#endif /* DRV_MT29F_H */
+#endif /* DRV_NAND_H */