*
* \brief AFSK modem hardware-specific definitions.
*
- * \version $Id$
- *
* \author Francesco Sacchi <batt@develer.com>
*/
#ifndef HW_AFSK_H
#define HW_AFSK_H
-#if !(ARCH & ARCH_UNITTEST)
- #warning TODO:This is an example implementation, you must implement it!
- #define AFSK_ADC_INIT() do { /* Implement me */ } while (0)
-
- #define AFSK_STROBE_INIT() do { /* Implement me */ } while (0)
- #define AFSK_STROBE_ON() do { /* Implement me */ } while (0)
- #define AFSK_STROBE_OFF() do { /* Implement me */ } while (0)
-
- void afsk_adc_isr(void);
- #define DEFINE_AFSK_ADC_ISR() void afsk_adc_isr(void)
- #define AFSK_ADC_IRQ_END() do { /* Implement me */ } while (0)
-
- #define AFSK_READ_ADC() (0)
+#include "cfg/cfg_arch.h"
- void afsk_dac_isr(void);
- #define DEFINE_AFSK_DAC_ISR() void afsk_dac_isr(void)
- #define AFSK_DAC_IRQ_END() do { /* Implement me */ } while (0)
- #define AFSK_DAC_IRQ_START() do { /* Implement me */ } while (0)
- #define AFSK_DAC_IRQ_STOP() do { /* Implement me */ } while (0)
- #define AFSK_SET_DAC(val) do { (void)val; } while (0)
-#else /* (ARCH & ARCH_UNITTEST) */
+#warning TODO:This is an example implementation, you must implement it!
- #include <stdio.h>
- /* For test */
- extern int8_t afsk_adc_val;
- extern uint32_t data_written;
- extern FILE *fp_dac;
- extern bool afsk_tx_test;
-
- #define AFSK_ADC_INIT() do { } while (0)
-
- #define AFSK_STROBE_INIT() /* Implement me */
- #define AFSK_STROBE_ON() /* Implement me */
- #define AFSK_STROBE_OFF() /* Implement me */
+/**
+ * Initialize the specified channel of the ADC for AFSK needs.
+ * The adc should be configured to have a continuos stream of convertions.
+ * For every convertion there must be an ISR that read the sample
+ * and call afsk_adc_isr(), passing the context and the sample.
+ *
+ * \param ch channel to be used for AFSK demodulation.
+ * \param ctx AFSK context (\see Afsk). This parameter must be saved and
+ * passed back to afsk_adc_isr() for every convertion.
+ */
+#define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0)
- void afsk_adc_isr(void);
- #define DEFINE_AFSK_ADC_ISR() void afsk_adc_isr(void)
+#define AFSK_STROBE_INIT() do { /* Implement me */ } while (0)
+#define AFSK_STROBE_ON() do { /* Implement me */ } while (0)
+#define AFSK_STROBE_OFF() do { /* Implement me */ } while (0)
- #define AFSK_READ_ADC() (afsk_adc_val)
+/**
+ * Initialize the specified channel of the DAC for AFSK needs.
+ * The DAC has to be configured in order to call an ISR for every sample sent.
+ * The DAC doesn't have to start the IRQ immediatly but have to wait
+ * the AFSK driver to call AFSK_DAC_IRQ_START().
+ * The ISR must then call afsk_dac_isr() passing the AFSK context.
+ * \param ch DAC channel to be used for AFSK modulation.
+ * \param ctx AFSK context (\see Afsk). This parameter must be saved and
+ * passed back to afsk_dac_isr() for every convertion.
+ */
+#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0)
- #define DEFINE_AFSK_DAC_ISR() void afsk_dac_isr(void)
- #define AFSK_DAC_IRQ_START() do { afsk_tx_test = true; } while (0)
- #define AFSK_DAC_IRQ_STOP() do { afsk_tx_test = false; } while (0)
- #define AFSK_SET_DAC(_val) \
- do { \
- int8_t val = (_val) - 128; \
- ASSERT(fwrite(&val, 1, sizeof(val), fp_dac) == sizeof(val)); \
- data_written++; \
- } while (0)
+/**
+ * Start DAC convertions on channel \a ch.
+ * \param ch DAC channel.
+ */
+#define AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0)
-#endif /* !(ARCH & ARCH_UNITTEST) */
+/**
+ * Stop DAC convertions on channel \a ch.
+ * \param ch DAC channel.
+ */
+#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0)
#endif /* HW_AFSK_H */