#include <io/arm.h>
-//#include "ser_at91.h"
#include <drv/ser.h>
#include <drv/ser_p.h>
#include <appconfig.h>
+#define SERIRQ_PRIORITY 4 ///< default priority for serial irqs.
/**
* \name Overridable serial bus hooks
/* Set the vector. */ \
AIC_SVR(US0_ID) = uart0_irq_dispatcher; \
/* Initialize to edge triggered with defined priority. */ \
- AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; \
+ AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY; \
/* Enable the USART IRQ */ \
AIC_IECR = BV(US0_ID); \
PMC_PCER = BV(US0_ID); \
*/
#if CPU_ARM_AT91
#define SER_UART0_BUS_TXINIT do { \
- PIOA_PDR = BV(5) | BV(6);\
+ PIOA_PDR = BV(5) | BV(6); \
US0_CR = BV(US_RSTRX) | BV(US_RSTTX); \
US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1; \
US0_CR = BV(US_RXEN) | BV(US_TXEN); \
* Invoked to send one character.
*/
#define SER_UART0_BUS_TXCHAR(c) do { \
- US0_THR = c; \
+ US0_THR = (c); \
} while (0)
#endif
#define SER_UART1_IRQ_INIT do { \
US1_IDR = 0xFFFFFFFF; \
/* Set the vector. */ \
- AIC_SVR(US1_ID) = uart0_irq_dispatcher; \
+ AIC_SVR(US1_ID) = uart1_irq_dispatcher; \
/* Initialize to edge triggered with defined priority. */ \
- AIC_SMR(US1_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; \
+ AIC_SMR(US1_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY; \
/* Enable the USART IRQ */ \
AIC_IECR = BV(US1_ID); \
PMC_PCER = BV(US1_ID); \
/** \sa SER_UART1_BUS_TXINIT */
#if CPU_ARM_AT91
#define SER_UART1_BUS_TXINIT do { \
- PIOA_PDR = BV(0) | BV(1); \
+ PIOA_PDR = BV(21) | BV(22); \
US1_CR = BV(US_RSTRX) | BV(US_RSTTX); \
US1_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1; \
US1_CR = BV(US_RXEN) | BV(US_TXEN); \
#ifndef SER_UART1_BUS_TXCHAR
/** \sa SER_UART1_BUS_TXCHAR */
#define SER_UART1_BUS_TXCHAR(c) do { \
- US1_THR = c; \
+ US1_THR = (c); \
} while (0)
#endif
/**
* Serial 0 TX interrupt handler
*/
-static void usart0_irq_tx(void)
+static void uart0_irq_tx(void)
{
SER_STROBE_ON;
else
{
char c = fifo_pop(txfifo);
-// kprintf("USART0 tx char: %c\n", c);
SER_UART0_BUS_TXCHAR(c);
}
/**
* Serial 0 RX complete interrupt handler.
*/
-static void usart0_irq_rx(void)
+static void uart0_irq_rx(void)
{
SER_STROBE_ON;
if (fifo_isfull(rxfifo))
ser_uart0->status |= SERRF_RXFIFOOVERRUN;
else
- {
-// kprintf("USART0 recv char: %c\n", c);
fifo_push(rxfifo, c);
- }
SER_STROBE_OFF;
}
IRQ_ENTRY();
if (US0_IMR & BV(US_RXRDY))
- {
-// kprintf("IRQ RX USART0\n");
- usart0_irq_rx();
- }
+ uart0_irq_rx();
+
if (US0_IMR & BV(US_TXRDY))
- {
-// kprintf("IRQ TX USART0\n");
- usart0_irq_tx();
- }
+ uart0_irq_tx();
+
IRQ_EXIT();
}
/**
* Serial 1 TX interrupt handler
*/
-static void usart1_irq_tx(void)
+static void uart1_irq_tx(void)
{
SER_STROBE_ON;
else
{
char c = fifo_pop(txfifo);
-// kprintf("USART1 tx char: %c\n", c);
SER_UART1_BUS_TXCHAR(c);
}
/**
* Serial 1 RX complete interrupt handler.
*/
-static void usart1_irq_rx(void)
+static void uart1_irq_rx(void)
{
SER_STROBE_ON;
if (fifo_isfull(rxfifo))
ser_uart1->status |= SERRF_RXFIFOOVERRUN;
else
- {
-// kprintf("USART1 recv char: %c\n", c);
fifo_push(rxfifo, c);
- }
SER_STROBE_OFF;
}
IRQ_ENTRY();
if (US1_IMR & BV(US_RXRDY))
- {
-// kprintf("IRQ RX USART1\n");
- usart1_irq_rx();
- }
+ uart1_irq_rx();
+
if (US1_IMR & BV(US_TXRDY))
- {
-// kprintf("IRQ TX USART1\n");
- usart1_irq_tx();
- }
+ uart1_irq_tx();
+
IRQ_EXIT();
}
/*
static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate)
{
/* Compute baud-rate period */
- US0_BRGR = CLOCK_FREQ / (16 * rate);
+ US1_BRGR = CLOCK_FREQ / (16 * rate);
//DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);)
}
static const struct SerialHardwareVT UART1_VT =
{
- C99INIT(init, uart0_init),
- C99INIT(cleanup, uart0_cleanup),
- C99INIT(setBaudrate, uart0_setbaudrate),
- C99INIT(setParity, uart0_setparity),
- C99INIT(txStart, uart0_enabletxirq),
+ C99INIT(init, uart1_init),
+ C99INIT(cleanup, uart1_cleanup),
+ C99INIT(setBaudrate, uart1_setbaudrate),
+ C99INIT(setParity, uart1_setparity),
+ C99INIT(txStart, uart1_enabletxirq),
C99INIT(txSending, tx_sending),
};